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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2017-01-19 19:39:45 +0300
committerDarren Hart <dvhart@linux.intel.com>2017-02-04 04:47:23 +0300
commit553e9c1861b7f91492eb6e209adff81507624fa6 (patch)
tree18f4b811d8a098374d76a51acd06fdd28c47b025 /drivers/platform
parent4b819c6d5f3c9f9efb8ab334f735f6a223e84d14 (diff)
downloadlinux-553e9c1861b7f91492eb6e209adff81507624fa6.tar.xz
platform/x86: intel_mid_powerbtn: Acknowledge interrupts
Some platforms require interrupt to be acknowledged by clearing MSIC_PWRBTNM bit in interrupt level 1 mask register. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r--drivers/platform/x86/intel_mid_powerbtn.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
index 596ac9f3e89d..ac02a0b8bef3 100644
--- a/drivers/platform/x86/intel_mid_powerbtn.c
+++ b/drivers/platform/x86/intel_mid_powerbtn.c
@@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
input_sync(input);
}
+ ddata->ack(ddata);
return IRQ_HANDLED;
}