diff options
| author | Sumit Saxena <sumit.saxena@avagotech.com> | 2016-01-28 18:34:28 +0300 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2016-02-24 05:27:02 +0300 |
| commit | 179ac14291a0e1cf8c2b2dfedce7c5af66696cc9 (patch) | |
| tree | 3c682b3d9639a17d03b6970a107078c9b43d75fa /drivers/scsi/megaraid/megaraid_sas.h | |
| parent | 8f05024cd3dbd3ec85923f3e8da05bf6db187d57 (diff) | |
| download | linux-179ac14291a0e1cf8c2b2dfedce7c5af66696cc9.tar.xz | |
megaraid_sas: Reply Descriptor Post Queue (RDPQ) support
This patch will create a reply queue pool for each MSI-X index and will
provide an array of base addresses instead of the single address of
legacy mode. Using this new interface the driver can support higher
queue depths through scattered DMA pools.
If array mode is not supported driver will fall back to the legacy
method of reply pool allocation. This limits controller queue depth to
1K max. To enable a queue depth of more than 1K driver requires firmware
to support array mode and scratch_pad3 will provide the new queue depth
value.
When RDPQ is used, downgrading to an older firmware release should not
be permitted. This may cause firmware fault and is not supported.
Signed-off-by: Kashyap Desai <kashyap.desai@avagotech.com>
Signed-off-by: Sumit Saxena <sumit.saxena@avagotech.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/megaraid/megaraid_sas.h')
| -rw-r--r-- | drivers/scsi/megaraid/megaraid_sas.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h index 01135be41751..3b1ed2d86efe 100644 --- a/drivers/scsi/megaraid/megaraid_sas.h +++ b/drivers/scsi/megaraid/megaraid_sas.h @@ -152,6 +152,7 @@ #define MFI_RESET_FLAGS MFI_INIT_READY| \ MFI_INIT_MFIMODE| \ MFI_INIT_ABORT +#define MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE (0x01) /* * MFI frame flags @@ -1416,6 +1417,7 @@ enum DCMD_TIMEOUT_ACTION { #define MR_MAX_REPLY_QUEUES_EXT_OFFSET 0X003FC000 #define MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT 14 #define MR_MAX_MSIX_REG_ARRAY 16 +#define MR_RDPQ_MODE_OFFSET 0X00800000 /* * register set for both 1068 and 1078 controllers * structure extended for 1078 registers @@ -1455,8 +1457,9 @@ struct megasas_register_set { u32 outbound_scratch_pad ; /*00B0h*/ u32 outbound_scratch_pad_2; /*00B4h*/ + u32 outbound_scratch_pad_3; /*00B8h*/ - u32 reserved_4[2]; /*00B8h*/ + u32 reserved_4; /*00BCh*/ u32 inbound_low_queue_port ; /*00C0h*/ @@ -2117,6 +2120,7 @@ struct megasas_instance { u8 mask_interrupts; u16 max_chain_frame_sz; u8 is_imr; + u8 is_rdpq; bool dev_handle; }; struct MR_LD_VF_MAP { |