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authorLucas Stach <l.stach@pengutronix.de>2021-05-10 07:00:41 +0300
committerShawn Guo <shawnguo@kernel.org>2021-05-23 05:58:12 +0300
commitfe58c887fb8ca25adab62fae20632d8423a00a91 (patch)
tree0743413c864a56cf357e87476ec363c71078edca /drivers/soc/imx
parentc0ce75395f8d088ba56dcec3218c628ef2bb6d73 (diff)
downloadlinux-fe58c887fb8ca25adab62fae20632d8423a00a91.tar.xz
soc: imx: gpcv2: add support for optional resets
Normally the reset for the devices inside the power domain is triggered automatically from the PGC in the power-up sequencing, however on i.MX8MM this doesn't work for the GPU power domains. Add support for triggering the reset explicitly during the power up sequencing. Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/soc/imx')
-rw-r--r--drivers/soc/imx/gpcv2.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index fdf759a7c865..04ce64326c19 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -15,6 +15,7 @@
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
+#include <linux/reset.h>
#include <linux/sizes.h>
#include <dt-bindings/power/imx7-power.h>
#include <dt-bindings/power/imx8mq-power.h>
@@ -108,6 +109,7 @@ struct imx_pgc_domain {
struct generic_pm_domain genpd;
struct regmap *regmap;
struct regulator *regulator;
+ struct reset_control *reset;
struct clk_bulk_data *clks;
int num_clks;
@@ -163,6 +165,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
goto out_regulator_disable;
}
+ reset_control_assert(domain->reset);
+
if (domain->bits.pxx) {
/* request the domain to power up */
regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
@@ -185,6 +189,11 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
GPC_PGC_CTRL_PCR);
}
+ /* delay for reset to propagate */
+ udelay(5);
+
+ reset_control_deassert(domain->reset);
+
/* request the ADB400 to power up */
if (domain->bits.hskreq) {
regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
@@ -540,6 +549,11 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)
return dev_err_probe(domain->dev, domain->num_clks,
"Failed to get domain's clocks\n");
+ domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev);
+ if (IS_ERR(domain->reset))
+ return dev_err_probe(domain->dev, PTR_ERR(domain->reset),
+ "Failed to get domain's resets\n");
+
pm_runtime_enable(domain->dev);
if (domain->bits.map)