diff options
author | Yang Yingliang <yangyingliang@huawei.com> | 2022-10-18 05:31:48 +0300 |
---|---|---|
committer | Conor Dooley <conor.dooley@microchip.com> | 2022-11-10 01:01:31 +0300 |
commit | 756344e7cb1afbb87da8705c20384dddd0dea233 (patch) | |
tree | 5cf47a2399cd9df46d3a1981731226f490cbc1f1 /drivers/soc | |
parent | 73e770f085023da327dc9ffeb6cd96b0bb22d97e (diff) | |
download | linux-756344e7cb1afbb87da8705c20384dddd0dea233.tar.xz |
soc: sifive: ccache: fix missing free_irq() in error path in sifive_ccache_init()
Add missing free_irq() before return error from sifive_ccache_init().
Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r-- | drivers/soc/sifive/sifive_ccache.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 25019c16d8ae..98269d056728 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -240,7 +240,7 @@ static int __init sifive_ccache_init(void) NULL); if (rc) { pr_err("Could not request IRQ %d\n", g_irq[i]); - goto err_unmap; + goto err_free_irq; } } @@ -254,6 +254,9 @@ static int __init sifive_ccache_init(void) #endif return 0; +err_free_irq: + while (--i >= 0) + free_irq(g_irq[i], NULL); err_unmap: iounmap(ccache_base); return rc; |