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authorPeter De Schrijver <pdeschrijver@nvidia.com>2018-01-25 17:00:13 +0300
committerThierry Reding <treding@nvidia.com>2018-03-08 19:02:24 +0300
commita263394a096e3578eb8dd77039b961c84a7392e7 (patch)
tree3a8ecb905329b6496fc920afe539850302c80ed3 /drivers/soc
parent56327f54d95c05791fd01e59a9dc03e3a4eafd21 (diff)
downloadlinux-a263394a096e3578eb8dd77039b961c84a7392e7.tar.xz
soc/tegra: pmc: MBIST work around for Tegra210
Apply the memory built-in self test work around when ungating certain Tegra210 power domains. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Hector Martin <marcan@marcan.st> Tested-by: Andre Heider <a.heider@gmail.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/tegra/pmc.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index a2df230bf51a..010fbc928cd3 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -153,6 +153,7 @@ struct tegra_pmc_soc {
bool has_tsense_reset;
bool has_gpu_clamps;
+ bool needs_mbist_war;
const struct tegra_io_pad_soc *io_pads;
unsigned int num_io_pads;
@@ -396,6 +397,11 @@ static int tegra_powergate_reset_deassert(struct tegra_powergate *pg)
return 0;
}
+int __weak tegra210_clk_handle_mbist_war(unsigned int id)
+{
+ return 0;
+}
+
static int tegra_powergate_power_up(struct tegra_powergate *pg,
bool disable_clocks)
{
@@ -431,6 +437,11 @@ static int tegra_powergate_power_up(struct tegra_powergate *pg,
usleep_range(10, 20);
+ if (pg->pmc->soc->needs_mbist_war)
+ err = tegra210_clk_handle_mbist_war(pg->id);
+ if (err)
+ goto disable_clks;
+
if (disable_clocks)
tegra_powergate_disable_clocks(pg);
@@ -1815,6 +1826,7 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = {
.cpu_powergates = tegra210_cpu_powergates,
.has_tsense_reset = true,
.has_gpu_clamps = true,
+ .needs_mbist_war = true,
.num_io_pads = ARRAY_SIZE(tegra210_io_pads),
.io_pads = tegra210_io_pads,
.regs = &tegra20_pmc_regs,