diff options
| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2013-10-10 17:40:02 +0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2013-12-11 13:03:33 +0400 |
| commit | af15d025ecdf35ad1eb438595727d80155d8d28e (patch) | |
| tree | e65acd059e949ea7c60890546d1cd449909b424b /drivers/staging/media/omap4iss/iss.c | |
| parent | 6016498f2b9d72b4f813d7349f0621ccc92c4f5a (diff) | |
| download | linux-af15d025ecdf35ad1eb438595727d80155d8d28e.tar.xz | |
[media] v4l: omap4iss: Enable/disabling the ISP interrupts globally
ISP interrupts are enabled/disabled when starting/stopping the IPIPEIF
or resizer. This doesn't permit using the two modules in separate
pipelines. Fix it by enabling/disabling the ISP interrupts at the same
time as the ISS interrupts, in the ISS device get/put operations.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/staging/media/omap4iss/iss.c')
| -rw-r--r-- | drivers/staging/media/omap4iss/iss.c | 54 |
1 files changed, 30 insertions, 24 deletions
diff --git a/drivers/staging/media/omap4iss/iss.c b/drivers/staging/media/omap4iss/iss.c index a0bf2f3cbd72..dffa31e274d6 100644 --- a/drivers/staging/media/omap4iss/iss.c +++ b/drivers/staging/media/omap4iss/iss.c @@ -67,53 +67,59 @@ void omap4iss_flush(struct iss_device *iss) } /* - * iss_enable_interrupts - Enable ISS interrupts. + * iss_isp_enable_interrupts - Enable ISS ISP interrupts. * @iss: OMAP4 ISS device */ -static void iss_enable_interrupts(struct iss_device *iss) +static void omap4iss_isp_enable_interrupts(struct iss_device *iss) { - static const u32 hl_irq = ISS_HL_IRQ_CSIA | ISS_HL_IRQ_CSIB | ISS_HL_IRQ_ISP(0); - - /* Enable HL interrupts */ - iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5), hl_irq); - iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_SET(5), hl_irq); + static const u32 isp_irq = ISP5_IRQ_OCP_ERR | + ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR | + ISP5_IRQ_RSZ_FIFO_OVF | + ISP5_IRQ_RSZ_INT_DMA | + ISP5_IRQ_ISIF_INT(0); + /* Enable ISP interrupts */ + iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQSTATUS(0), isp_irq); + iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_SET(0), + isp_irq); } /* - * iss_disable_interrupts - Disable ISS interrupts. + * iss_isp_disable_interrupts - Disable ISS interrupts. * @iss: OMAP4 ISS device */ -static void iss_disable_interrupts(struct iss_device *iss) +static void omap4iss_isp_disable_interrupts(struct iss_device *iss) { - iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_CLR(5), -1); + iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_CLR(0), ~0); } /* - * iss_isp_enable_interrupts - Enable ISS ISP interrupts. + * iss_enable_interrupts - Enable ISS interrupts. * @iss: OMAP4 ISS device */ -void omap4iss_isp_enable_interrupts(struct iss_device *iss) +static void iss_enable_interrupts(struct iss_device *iss) { - static const u32 isp_irq = ISP5_IRQ_OCP_ERR | - ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR | - ISP5_IRQ_RSZ_FIFO_OVF | - ISP5_IRQ_RSZ_INT_DMA | - ISP5_IRQ_ISIF_INT(0); + static const u32 hl_irq = ISS_HL_IRQ_CSIA | ISS_HL_IRQ_CSIB + | ISS_HL_IRQ_ISP(0); - /* Enable ISP interrupts */ - iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQSTATUS(0), isp_irq); - iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_SET(0), - isp_irq); + /* Enable HL interrupts */ + iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5), hl_irq); + iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_SET(5), hl_irq); + + if (iss->regs[OMAP4_ISS_MEM_ISP_SYS1]) + omap4iss_isp_enable_interrupts(iss); } /* - * iss_isp_disable_interrupts - Disable ISS interrupts. + * iss_disable_interrupts - Disable ISS interrupts. * @iss: OMAP4 ISS device */ -void omap4iss_isp_disable_interrupts(struct iss_device *iss) +static void iss_disable_interrupts(struct iss_device *iss) { - iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_CLR(0), -1); + if (iss->regs[OMAP4_ISS_MEM_ISP_SYS1]) + omap4iss_isp_disable_interrupts(iss); + + iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_CLR(5), ~0); } int omap4iss_get_external_info(struct iss_pipeline *pipe, |