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authorRajmohan Mani <rajmohan.mani@intel.com>2020-03-05 17:33:46 +0300
committerMika Westerberg <mika.westerberg@linux.intel.com>2020-06-22 19:58:32 +0300
commit02d12855f51651cc9cf8e59e6cbb24a5d9e0a054 (patch)
tree3ea8dc7a031ee2a34b04f714eccf7f039e67b1da /drivers/thunderbolt/sb_regs.h
parent6bfe33473eaac9443dfce129b3107cc27abc1e47 (diff)
downloadlinux-02d12855f51651cc9cf8e59e6cbb24a5d9e0a054.tar.xz
thunderbolt: Implement USB4 port sideband operations for retimer access
USB4 spec specifies standard set of sideband operations that are send over the low speed link to access either retimers on the link or the link parter (the other router). The USB4 retimer spec extends these and adds operations for retimer NVM upgrade. This implements the retimer access and NVM upgrade USB4 port sideband operations which we need for retimer support in the patch that follows. Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Co-developed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/sb_regs.h')
-rw-r--r--drivers/thunderbolt/sb_regs.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/thunderbolt/sb_regs.h b/drivers/thunderbolt/sb_regs.h
new file mode 100644
index 000000000000..0e587b7b9200
--- /dev/null
+++ b/drivers/thunderbolt/sb_regs.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * USB4 port sideband registers found on routers and retimers
+ *
+ * Copyright (C) 2020, Intel Corporation
+ * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
+ * Rajmohan Mani <rajmohan.mani@intel.com>
+ */
+
+#ifndef _SB_REGS
+#define _SB_REGS
+
+#define USB4_SB_OPCODE 0x08
+
+enum usb4_sb_opcode {
+ USB4_SB_OPCODE_ERR = 0x20525245, /* "ERR " */
+ USB4_SB_OPCODE_ONS = 0x444d4321, /* "!CMD" */
+ USB4_SB_OPCODE_ENUMERATE_RETIMERS = 0x4d554e45, /* "ENUM" */
+ USB4_SB_OPCODE_QUERY_LAST_RETIMER = 0x5453414c, /* "LAST" */
+ USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE = 0x53534e47, /* "GNSS" */
+ USB4_SB_OPCODE_NVM_SET_OFFSET = 0x53504f42, /* "BOPS" */
+ USB4_SB_OPCODE_NVM_BLOCK_WRITE = 0x574b4c42, /* "BLKW" */
+ USB4_SB_OPCODE_NVM_AUTH_WRITE = 0x48545541, /* "AUTH" */
+ USB4_SB_OPCODE_NVM_READ = 0x52524641, /* "AFRR" */
+};
+
+#define USB4_SB_METADATA 0x09
+#define USB4_SB_METADATA_NVM_AUTH_WRITE_MASK GENMASK(5, 0)
+#define USB4_SB_DATA 0x12
+
+#endif