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authorJake Wang <haonan.wang2@amd.com>2020-12-12 00:53:57 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-12-23 23:02:47 +0300
commit4aa9d658d21cf192fa12227591526d06fec114e0 (patch)
tree78182e9a20c30361f41122ae03d6222e9553fadb /drivers
parentc277925cca8c534ddcf1fb0ec9b9e4ca35b1d064 (diff)
downloadlinux-4aa9d658d21cf192fa12227591526d06fec114e0.tar.xz
drm/amd/display: always program DPPDTO unless not safe to lower
[Why] We defer clock updates to after pipes have been programmed. In some instances we use DPPCLK that have been previously set to be "unused". This results in a brief window of time where underflow could occur. [How] During prepare bandwidth allow rn_update_clocks_update_dpp_dto to check each instance and compare previous clock to new clock. If new clock is higher than previous clock, program DPPDTO. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index bad30217c7b4..01b1853b7750 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -227,12 +227,11 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base,
rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
// always update dtos unless clock is lowered and not safe to lower
- if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
- rn_update_clocks_update_dpp_dto(
- clk_mgr,
- context,
- clk_mgr_base->clks.actual_dppclk_khz,
- safe_to_lower);
+ rn_update_clocks_update_dpp_dto(
+ clk_mgr,
+ context,
+ clk_mgr_base->clks.actual_dppclk_khz,
+ safe_to_lower);
}
if (update_dispclk &&