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authorTom St Denis <tom.stdenis@amd.com>2022-09-07 17:18:01 +0300
committerAlex Deucher <alexander.deucher@amd.com>2022-09-08 05:28:42 +0300
commit780244a2fe8a82424c85f4cb15e45d0bbeec8f26 (patch)
tree6c4bb55c02214d04a5311ca7493d5de666257d20 /include/drm/display
parent096e33f8ce4f4c82035edb532e8cb0883831e14b (diff)
downloadlinux-780244a2fe8a82424c85f4cb15e45d0bbeec8f26.tar.xz
drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers
The TCC_DISABLE registers were not included in the 10.3 headers and instead just placed directly in the gfx_v10_0.c source. This patch adds them to the headers so tools like umr can scan them and support them. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm/display')
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