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| author | Mikko Perttunen <mperttunen@nvidia.com> | 2022-06-27 17:19:57 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2022-07-08 17:17:04 +0300 |
| commit | 63a6ef2360bdeffcdd41bcdd86937b6db17b573d (patch) | |
| tree | d4fc53797c191beaabec651add923fd9e11b09f4 /include/dt-bindings/clock | |
| parent | dd92b16cbc9834e0350c796f5d71f715f5b1af3c (diff) | |
| download | linux-63a6ef2360bdeffcdd41bcdd86937b6db17b573d.tar.xz | |
dt-bindings: Add headers for Host1x and VIC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/tegra234-clock.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h index bab85d9ba8cd..173364a93381 100644 --- a/include/dt-bindings/clock/tegra234-clock.h +++ b/include/dt-bindings/clock/tegra234-clock.h @@ -38,6 +38,8 @@ * throughput and memory controller power. */ #define TEGRA234_CLK_EMC 31U +/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X */ +#define TEGRA234_CLK_HOST1X 46U /** @brief output of gate CLK_ENB_FUSE */ #define TEGRA234_CLK_FUSE 40U /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 */ @@ -132,6 +134,8 @@ #define TEGRA234_CLK_UARTA 155U /** @brief output of gate CLK_ENB_PEX1_CORE_6 */ #define TEGRA234_CLK_PEX1_C6_CORE 161U +/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VIC */ +#define TEGRA234_CLK_VIC 167U /** @brief output of gate CLK_ENB_PEX2_CORE_7 */ #define TEGRA234_CLK_PEX2_C7_CORE 171U /** @brief output of gate CLK_ENB_PEX2_CORE_8 */ |