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| author | Ziyuan Xu <xzy.xu@rock-chips.com> | 2018-10-11 10:26:43 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2018-10-11 15:36:01 +0300 |
| commit | 82f4b67f018c88a7cc9337f0067ed3d6ec352648 (patch) | |
| tree | 5cca1de112a03a24227f12a8d5cf8dfbab40373c /include/dt-bindings/memory | |
| parent | c14d28e86d3c70720622e1d517968c1721f23214 (diff) | |
| download | linux-82f4b67f018c88a7cc9337f0067ed3d6ec352648.tar.xz | |
clk: rockchip: fix wrong mmc sample phase shift for rk3328
mmc sample shift is 0 for RK3328 referring to the TRM.
So fix them.
Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings/memory')
0 files changed, 0 insertions, 0 deletions