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authorLinus Torvalds <torvalds@linux-foundation.org>2020-06-05 06:02:14 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2020-06-05 06:02:14 +0300
commit9d71d3cd9ef040c284506648285915e9ba4d08c4 (patch)
tree3baeb9955b01b1d5145389a6976ed6b69ded096f /include/dt-bindings/reset
parent828f3e18e1cb98c68fc6db4d5113513d4a267775 (diff)
parent9ad249abe7b8f6f0d2d876bde860b1c511d71d7b (diff)
downloadlinux-9d71d3cd9ef040c284506648285915e9ba4d08c4.tar.xz
Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "This is the set of device tree changes, mostly covering new hardware support, with 577 patches touching a little over 500 files. There are five new Arm SoCs supported in this release, all of them for existing SoC families: - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS devices and Android Set-top-box designs, along with the "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4 single-board computer. - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and the iW-RainboW-G21D-Qseven-RZG1H board/SoM - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO Advance game console Newly added machines on already supported SoCs are: - AMLogic S905D based Smartlabs SML-5442TW TV box - AMLogic S905X3 based ODROID-C4 SBC - AMLogic S922XH based Beelink GT-King Pro TV box - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO OpenPower P9 "Nicole" - Marvell Kirkwood based Check Point L-50 router - Mediatek MT8173 based Elm/Hana Chromebook laptops - Microchip SAMA5D2 "Industrial Connectivity Platform" reference board - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit - Octavo OSDMP15x based Linux Automation MC-1 development board - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone - Realtek RTD1295 based Xnano X5 TV Box - STMicroelectronics STM32MP1 based Stinger96 single-board computer and IoT Box - Samsung Exynos4210 based based Samsung Galaxy S2 phone - Socionext Uniphier based Akebi96 SBC - TI Keystone based K2G Evaluation board - TI am5729 based Beaglebone-AI development board Include device descriptions for additional hardware support in existing SoCs and machines based on all major SoC platforms: - AMlogic Meson - Allwinner sunxi - Arm Juno/VFP/Vexpress/Integrator - Broadcom bcm283x/bcm2711 - Hisilicon hi6220 - Marvell EBU - Mediatek MT27xx, MT76xx, MT81xx and MT67xx - Microchip SAMA5D2 - NXP i.MX6/i.MX7/i.MX8 and Layerscape - Nvidia Tegra - Qualcomm Snapdragon - Renesas r8a77961, r8a7791 - Rockchips RK32xx/RK33xx - ST-Ericsson ux500 - STMicroelectronics SMT32 - Samsung Exynos and S5PV210 - Socionext Uniphier - TI OMAP5/DRA7 and Keystone" * tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits) ARM: dts: keystone: Rename "msmram" node to "sram" arm: dts: mt2712: add uart APDMA to device tree arm64: dts: mt8183: add mmc node arm64: dts: mt2712: add ethernet device node arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 ARM: dts: mmp3: Add the fifth SD HCI ARM: dts: berlin*: Fix up the SDHCI node names ARM: dts: mmp3: Fix USB & USB PHY node names ARM: dts: mmp3: Fix L2 cache controller node name ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa910: Fix the gpio interrupt cell number ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property ARM: dts: pxa168: Fix the gpio interrupt cell number ARM: dts: pxa168: Add missing address/size cells to i2c nodes ARM: dts: dove: Fix interrupt controller node name ARM: dts: kirkwood: Fix interrupt controller node name arm64: dts: Add SC9863A emmc and sd card nodes arm64: dts: Add SC9863A clock nodes arm64: dts: mt6358: add PMIC MT6358 related nodes ...
Diffstat (limited to 'include/dt-bindings/reset')
-rw-r--r--include/dt-bindings/reset/realtek,rtd1195.h74
-rw-r--r--include/dt-bindings/reset/realtek,rtd1295.h3
2 files changed, 77 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/realtek,rtd1195.h b/include/dt-bindings/reset/realtek,rtd1195.h
new file mode 100644
index 000000000000..27902abf935b
--- /dev/null
+++ b/include/dt-bindings/reset/realtek,rtd1195.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+/*
+ * Realtek RTD1195 reset controllers
+ *
+ * Copyright (c) 2017 Andreas Färber
+ */
+#ifndef DT_BINDINGS_RESET_RTD1195_H
+#define DT_BINDINGS_RESET_RTD1195_H
+
+/* soft reset 1 */
+#define RTD1195_RSTN_MISC 0
+#define RTD1195_RSTN_RNG 1
+#define RTD1195_RSTN_USB3_POW 2
+#define RTD1195_RSTN_GSPI 3
+#define RTD1195_RSTN_USB3_P0_MDIO 4
+#define RTD1195_RSTN_VE_H265 5
+#define RTD1195_RSTN_USB 6
+#define RTD1195_RSTN_USB_PHY0 8
+#define RTD1195_RSTN_USB_PHY1 9
+#define RTD1195_RSTN_HDMIRX 11
+#define RTD1195_RSTN_HDMI 12
+#define RTD1195_RSTN_ETN 14
+#define RTD1195_RSTN_AIO 15
+#define RTD1195_RSTN_GPU 16
+#define RTD1195_RSTN_VE_H264 17
+#define RTD1195_RSTN_VE_JPEG 18
+#define RTD1195_RSTN_TVE 19
+#define RTD1195_RSTN_VO 20
+#define RTD1195_RSTN_LVDS 21
+#define RTD1195_RSTN_SE 22
+#define RTD1195_RSTN_DCU 23
+#define RTD1195_RSTN_DC_PHY 24
+#define RTD1195_RSTN_CP 25
+#define RTD1195_RSTN_MD 26
+#define RTD1195_RSTN_TP 27
+#define RTD1195_RSTN_AE 28
+#define RTD1195_RSTN_NF 29
+#define RTD1195_RSTN_MIPI 30
+
+/* soft reset 2 */
+#define RTD1195_RSTN_ACPU 0
+#define RTD1195_RSTN_VCPU 1
+#define RTD1195_RSTN_PCR 9
+#define RTD1195_RSTN_CR 10
+#define RTD1195_RSTN_EMMC 11
+#define RTD1195_RSTN_SDIO 12
+#define RTD1195_RSTN_I2C_5 18
+#define RTD1195_RSTN_RTC 20
+#define RTD1195_RSTN_I2C_4 23
+#define RTD1195_RSTN_I2C_3 24
+#define RTD1195_RSTN_I2C_2 25
+#define RTD1195_RSTN_I2C_1 26
+#define RTD1195_RSTN_UR1 28
+
+/* soft reset 3 */
+#define RTD1195_RSTN_SB2 0
+
+/* iso soft reset */
+#define RTD1195_ISO_RSTN_VFD 0
+#define RTD1195_ISO_RSTN_IR 1
+#define RTD1195_ISO_RSTN_CEC0 2
+#define RTD1195_ISO_RSTN_CEC1 3
+#define RTD1195_ISO_RSTN_DP 4
+#define RTD1195_ISO_RSTN_CBUSTX 5
+#define RTD1195_ISO_RSTN_CBUSRX 6
+#define RTD1195_ISO_RSTN_EFUSE 7
+#define RTD1195_ISO_RSTN_UR0 8
+#define RTD1195_ISO_RSTN_GMAC 9
+#define RTD1195_ISO_RSTN_GPHY 10
+#define RTD1195_ISO_RSTN_I2C_0 11
+#define RTD1195_ISO_RSTN_I2C_6 12
+#define RTD1195_ISO_RSTN_CBUS 13
+
+#endif
diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h
index 2c0cb6afe816..dd89e4c80264 100644
--- a/include/dt-bindings/reset/realtek,rtd1295.h
+++ b/include/dt-bindings/reset/realtek,rtd1295.h
@@ -75,6 +75,9 @@
#define RTD1295_RSTN_CBUS_TX 30
#define RTD1295_RSTN_SDS_PHY 31
+/* soft reset 3 */
+#define RTD1295_RSTN_SB2 0
+
/* soft reset 4 */
#define RTD1295_RSTN_DCPHY_CRT 0
#define RTD1295_RSTN_DCPHY_ALERT_RX 1