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author | Alim Akhtar <alim.akhtar@samsung.com> | 2022-05-18 16:23:50 +0300 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-06 11:31:37 +0300 |
commit | 5355559555b98cd2f0b96b2c4e56c32356f90cc1 (patch) | |
tree | 5f1e9a35c8c777e04064cb13e66be5089ecb80e0 /include/dt-bindings/soc | |
parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
download | linux-5355559555b98cd2f0b96b2c4e56c32356f90cc1.tar.xz |
arm64: dts: fsd: Add cpu cache information
Add CPU caches information so that the same is available to
userspace via sysfs. This SoC has 48/32 KB I/D cache for
each CPU cores and 4MB of L2 cache.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220518132350.35762-1-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'include/dt-bindings/soc')
0 files changed, 0 insertions, 0 deletions