diff options
| author | Weiyi Lu <weiyi.lu@mediatek.com> | 2020-10-30 14:36:20 +0300 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2020-11-27 13:58:08 +0300 |
| commit | 343106d9e61260e4ac569c54dd19201b9e704d46 (patch) | |
| tree | b3a9999bcd50916a8c7ba7736899a268ddcc9b95 /include/dt-bindings | |
| parent | 86a378bb1e98793409e5decfef50edadbca659c5 (diff) | |
| download | linux-343106d9e61260e4ac569c54dd19201b9e704d46.tar.xz | |
dt-bindings: power: Add MT8192 power domains
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201030113622.201188-15-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/power/mt8192-power.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h new file mode 100644 index 000000000000..4eaa53d7270a --- /dev/null +++ b/include/dt-bindings/power/mt8192-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (c) 2020 MediaTek Inc. + * Author: Weiyi Lu <weiyi.lu@mediatek.com> + */ + +#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H +#define _DT_BINDINGS_POWER_MT8192_POWER_H + +#define MT8192_POWER_DOMAIN_AUDIO 0 +#define MT8192_POWER_DOMAIN_CONN 1 +#define MT8192_POWER_DOMAIN_MFG0 2 +#define MT8192_POWER_DOMAIN_MFG1 3 +#define MT8192_POWER_DOMAIN_MFG2 4 +#define MT8192_POWER_DOMAIN_MFG3 5 +#define MT8192_POWER_DOMAIN_MFG4 6 +#define MT8192_POWER_DOMAIN_MFG5 7 +#define MT8192_POWER_DOMAIN_MFG6 8 +#define MT8192_POWER_DOMAIN_DISP 9 +#define MT8192_POWER_DOMAIN_IPE 10 +#define MT8192_POWER_DOMAIN_ISP 11 +#define MT8192_POWER_DOMAIN_ISP2 12 +#define MT8192_POWER_DOMAIN_MDP 13 +#define MT8192_POWER_DOMAIN_VENC 14 +#define MT8192_POWER_DOMAIN_VDEC 15 +#define MT8192_POWER_DOMAIN_VDEC2 16 +#define MT8192_POWER_DOMAIN_CAM 17 +#define MT8192_POWER_DOMAIN_CAM_RAWA 18 +#define MT8192_POWER_DOMAIN_CAM_RAWB 19 +#define MT8192_POWER_DOMAIN_CAM_RAWC 20 + +#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */ |