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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-05-02 15:35:02 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-05-05 13:10:21 +0300
commit53c58c08b454aea3c9c9ceda600567436134e6a2 (patch)
tree7280388f2c583d2ac90ca29a10dc4f307a13098c /include/dt-bindings
parent84c9829d16d86a09703d9f2c8dac3816c56bcdcd (diff)
downloadlinux-53c58c08b454aea3c9c9ceda600567436134e6a2.tar.xz
clk: renesas: r9a07g044: Fix OSTM1 module clock name
Fix a typo in the name of the "ostm1_pclk" clock. This change has no run-time impact. Fixes: 161450134ae9bab3 ("clk: renesas: r9a07g044: Add OSTM clock and reset entries") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e0eff1f57378ec29d0d3f1a7bdd7e380583f736b.1651494871.git.geert+renesas@glider.be
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