diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2015-01-20 05:05:28 +0300 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-01-27 22:48:39 +0300 |
| commit | 15a02c1f6dd7c2bb150c61d00ffb33f584ff2288 (patch) | |
| tree | 803aecc489bac86074b95d25cbdb2bbc426ffb38 /include/linux/clk-provider.h | |
| parent | 52bba9809a954d72bc77773bd560b9724b495eb7 (diff) | |
| download | linux-15a02c1f6dd7c2bb150c61d00ffb33f584ff2288.tar.xz | |
clk: Add __clk_mux_determine_rate_closest
Some clock drivers want to find the closest rate on the input of
a mux instead of a rate that's less than or equal to the desired
rate. Add a generic mux function to support this.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/linux/clk-provider.h')
| -rw-r--r-- | include/linux/clk-provider.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index ebb7055a6d84..ba858e90d5de 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -384,6 +384,8 @@ void clk_unregister_divider(struct clk *clk); * register, and mask of mux bits are in higher 16-bit of this register. * While setting the mux bits, higher 16-bit should also be updated to * indicate changing mux bits. + * CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired + * frequency. */ struct clk_mux { struct clk_hw hw; @@ -398,7 +400,8 @@ struct clk_mux { #define CLK_MUX_INDEX_ONE BIT(0) #define CLK_MUX_INDEX_BIT BIT(1) #define CLK_MUX_HIWORD_MASK BIT(2) -#define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */ +#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */ +#define CLK_MUX_ROUND_CLOSEST BIT(4) extern const struct clk_ops clk_mux_ops; extern const struct clk_ops clk_mux_ro_ops; @@ -556,6 +559,9 @@ struct clk *__clk_lookup(const char *name); long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, struct clk_hw **best_parent_p); +long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, + unsigned long *best_parent_rate, + struct clk_hw **best_parent_p); /* * FIXME clock api without lock protection |