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authorThierry Reding <treding@nvidia.com>2017-11-07 21:15:51 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-11-08 16:09:24 +0300
commitdc6bafee86897419b0908e8d1e52ef46ca0ea487 (patch)
tree014392c352a1d35032a7290051a9b60af1e93e81 /include/linux/gpio
parent39e5f0969514fbfd6c235ac52586c72ca77cee00 (diff)
downloadlinux-dc6bafee86897419b0908e8d1e52ef46ca0ea487.tar.xz
gpio: Move irq_nested into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio')
-rw-r--r--include/linux/gpio/driver.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 86f00d908e90..1c3d06fe54b1 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -92,6 +92,13 @@ struct gpio_irq_chip {
* driver, so the core will only reference this list, not modify it.
*/
unsigned int *parents;
+
+ /**
+ * @nested:
+ *
+ * True if set the interrupt handling is nested.
+ */
+ bool nested;
};
static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)
@@ -163,7 +170,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)
* safely.
* @bgpio_dir: shadowed direction register for generic GPIO to clear/set
* direction safely.
- * @irq_nested: True if set the interrupt handling is nested.
* @irq_need_valid_mask: If set core allocates @irq_valid_mask with all
* bits set to one
* @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to
@@ -238,7 +244,6 @@ struct gpio_chip {
* With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
* to handle IRQs for most practical cases.
*/
- bool irq_nested;
bool irq_need_valid_mask;
unsigned long *irq_valid_mask;
struct lock_class_key *lock_key;