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authorQuentin Schulz <quentin.schulz@bootlin.com>2018-10-04 15:22:03 +0300
committerDavid S. Miller <davem@davemloft.net>2018-10-06 00:36:44 +0300
commitc2a90025ad09d830c8d8ae69f485eac6aaaa2472 (patch)
tree0b8d7fb1597c9276e8a7a07929d79725fb7affd6 /include/linux/phy
parent66c213233308ac94fabed80b09041eb14f8d787b (diff)
downloadlinux-c2a90025ad09d830c8d8ae69f485eac6aaaa2472.tar.xz
phy: add QSGMII and PCIE modes
Prepare for upcoming phys that'll handle QSGMII or PCIe. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/phy')
-rw-r--r--include/linux/phy/phy.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 9713aebdd348..03b319f89a34 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -37,9 +37,11 @@ enum phy_mode {
PHY_MODE_USB_OTG,
PHY_MODE_SGMII,
PHY_MODE_2500SGMII,
+ PHY_MODE_QSGMII,
PHY_MODE_10GKR,
PHY_MODE_UFS_HS_A,
PHY_MODE_UFS_HS_B,
+ PHY_MODE_PCIE,
};
/**