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authorjilai wang <jilaiw@codeaurora.org>2015-04-10 23:15:59 +0300
committerKumar Gala <galak@codeaurora.org>2015-05-28 18:47:45 +0300
commit9626b6993b2e6faf047d2d96958e8474edc9c7a5 (patch)
tree1d6522df22f58a37088f1942460b8779cebe2d2e /include/linux/qcom_scm.h
parentb6a1dfbc7d57409accf213e78db7b059c206be9e (diff)
downloadlinux-9626b6993b2e6faf047d2d96958e8474edc9c7a5.tar.xz
firmware: qcom: scm: Add HDCP Support
HDCP driver needs to check if secure environment supports HDCP. If it's supported, then it requires to program some registers through SCM. Add qcom_scm_hdcp_available and qcom_scm_hdcp_req to support these requirements. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'include/linux/qcom_scm.h')
-rw-r--r--include/linux/qcom_scm.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index d7a974d5f57c..6e7d5ec65838 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
* Copyright (C) 2015 Linaro Ltd.
*
* This program is free software; you can redistribute it and/or modify
@@ -16,6 +16,17 @@
extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
+#define QCOM_SCM_HDCP_MAX_REQ_CNT 5
+
+struct qcom_scm_hdcp_req {
+ u32 addr;
+ u32 val;
+};
+
+extern bool qcom_scm_hdcp_available(void);
+extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
+ u32 *resp);
+
#define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1