diff options
author | Christoffer Dall <cdall@linaro.org> | 2017-03-22 00:05:22 +0300 |
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committer | Christoffer Dall <cdall@linaro.org> | 2017-04-04 15:33:59 +0300 |
commit | 6d56111c92d247bb64301029fe88365aa4caf16e (patch) | |
tree | 0ceec9bfeae39452c020baa35b99f91d9e4bae76 /include/linux | |
parent | 5b0d2cc2805897c14257f6dbb949639c499c3c25 (diff) | |
download | linux-6d56111c92d247bb64301029fe88365aa4caf16e.tar.xz |
KVM: arm/arm64: vgic: Fix GICC_PMR uaccess on GICv3 and clarify ABI
As an oversight, for GICv2, we accidentally export the GICC_PMR register
in the format of the GICH_VMCR.VMPriMask field in the lower 5 bits of a
word, meaning that userspace must always use the lower 5 bits to
communicate with the KVM device and must shift the value left by 3
places to obtain the actual priority mask level.
Since GICv3 supports the full 8 bits of priority masking in the ICH_VMCR,
we have to fix the value we export when emulating a GICv2 on top of a
hardware GICv3 and exporting the emulated GICv2 state to userspace.
Take the chance to clarify this aspect of the ABI.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/irqchip/arm-gic.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index eafc965b3eb8..dc30f3d057eb 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -96,6 +96,9 @@ #define GICH_MISR_EOI (1 << 0) #define GICH_MISR_U (1 << 1) +#define GICV_PMR_PRIORITY_SHIFT 3 +#define GICV_PMR_PRIORITY_MASK (0x1f << GICV_PMR_PRIORITY_SHIFT) + #ifndef __ASSEMBLY__ #include <linux/irqdomain.h> |