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authorOhad Sharabi <osharabi@habana.ai>2022-12-18 10:42:34 +0300
committerOded Gabbay <ogabbay@kernel.org>2023-01-26 12:52:10 +0300
commit20faaeec3794661c1d73578316691174a5a0e5a9 (patch)
treea390f01c243d2fcabe40cd0d625c2627eb4ee073 /include/uapi/drm/habanalabs_accel.h
parente65e175b07bef5974045cc42238de99057669ca7 (diff)
downloadlinux-20faaeec3794661c1d73578316691174a5a0e5a9.tar.xz
habanalabs: add uapi to flush inbound HBM transactions
When doing p2p with a NIC device, the NIC needs to make sure all the writes to the HBM (through the PCI bar of the Gaudi device) were flushed. It can be done by either the NIC or the host reading through the PCI bar. To support the host side, we supply a simple uapi to perform this flush through the driver, because the user can't create such a transaction by itself (the PCI bar isn't exposed to normal users). Signed-off-by: Ohad Sharabi <osharabi@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'include/uapi/drm/habanalabs_accel.h')
-rw-r--r--include/uapi/drm/habanalabs_accel.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/uapi/drm/habanalabs_accel.h b/include/uapi/drm/habanalabs_accel.h
index 90e628779264..331567ec9e79 100644
--- a/include/uapi/drm/habanalabs_accel.h
+++ b/include/uapi/drm/habanalabs_accel.h
@@ -1478,6 +1478,14 @@ struct hl_cs_chunk {
*/
#define HL_CS_FLAGS_ENGINE_CORE_COMMAND 0x4000
+/*
+ * The flush HBW PCI writes is merged into the existing CS ioctls.
+ * Used to flush all HBW PCI writes.
+ * This is a blocking operation and for this reason the user shall not use
+ * the return sequence number (which will be invalid anyway)
+ */
+#define HL_CS_FLAGS_FLUSH_PCI_HBW_WRITES 0x8000
+
#define HL_CS_STATUS_SUCCESS 0
#define HL_MAX_JOBS_PER_CS 512