Merge tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull mtd updates from Miquel Raynal:
 "Core MTD changes:
   - dt-bindings: Drop unneeded quotes
   - mtdblock: Tolerate corrected bit-flips
   - Use of_property_read_bool() for boolean properties
   - Avoid magic values
   - Avoid printing error messages on probe deferrals
   - Prepare mtd_otp_nvmem_add() to handle -EPROBE_DEFER
   - Fix error path for nvmem provider
   - Fix nvmem error reporting
   - Provide unique name for nvmem device

  MTD device changes:
   - lpddr_cmds: Remove unused words variable
   - bcm63xxpart: Remove MODULE_LICENSE in non-modules

  SPI NOR core changes:
   - Introduce Read While Write support for flashes featuring several
     banks
   - Set the 4-Byte Address Mode method based on SFDP data
   - Allow post_sfdp hook to return errors
   - Parse SCCR MC table and introduce support for multi-chip devices

  SPI NOR manufacturer drivers changes:
   - macronix: Add support for mx25uw51245g with RWW
   - spansion:
      - Determine current address mode at runtime as it can be changed
        in a non-volatile way and differ from factory defaults or from
        what SFDP advertises.
      - Enable JFFS2 write buffer mode for few ECC'd NOR flashes:
        S25FS256T, s25hx and s28hx
      - Add support for s25hl02gt and s25hs02gt

  Raw NAND core changes:
   - Convert to platform remove callback returning void
   - Fix spelling mistake waifunc() -> waitfunc()

  Raw NAND controller driver changes:
   - imx: Remove unused is_imx51_nfc and imx53_nfc functions
   - omap2: Drop obsolete dependency on COMPILE_TEST
   - orion: Use devm_platform_ioremap_resource()
   - qcom:
      - Use of_property_present() for testing DT property presence
      - Use devm_platform_get_and_ioremap_resource()
   - stm32_fmc2: Depends on ARCH_STM32 instead of MACH_STM32MP157
   - tmio: Remove reference to config MTD_NAND_TMIO in the parsers

  Raw NAND manufacturer driver changes:
   - hynix: Fix up bit 0 of sdr_timing_mode

  SPI-NAND changes:
   - Add support for ESMT F50x1G41LB"

* tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (55 commits)
  mtd: nand: Convert to platform remove callback returning void
  mtd: onenand: omap2: Drop obsolete dependency on COMPILE_TEST
  mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gt
  mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip device
  mtd: spi-nor: spansion: Rework cypress_nor_quad_enable_volatile() for multi-chip device support
  mtd: spi-nor: spansion: Rework cypress_nor_get_page_size() for multi-chip device support
  mtd: spi-nor: sfdp: Add support for SCCR map for multi-chip device
  mtd: spi-nor: Extract volatile register offset from SCCR map
  mtd: spi-nor: Allow post_sfdp hook to return errors
  mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for S25FS256T
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s25hx SEMPER flash
  mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash
  mtd: spi-nor: spansion: Determine current address mode
  mtd: spi-nor: core: Introduce spi_nor_set_4byte_addr_mode()
  mtd: spi-nor: core: Update flash's current address mode when changing address mode
  mtd: spi-nor: Stop exporting spi_nor_restore()
  mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP data
  mtd: spi-nor: core: Make spi_nor_set_4byte_addr_mode_brwr public
  mtd: spi-nor: core: Update name and description of spi_nor_set_4byte_addr_mode
  ...

3 files changed, 15 insertions, 7 deletions

diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index f8d4be9c587a..5159d692f9ce 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1075,7 +1075,7 @@ static inline void nand_op_trace(const char *prefix,
  * @exec_op:	 controller specific method to execute NAND operations.
  *		 This method replaces chip->legacy.cmdfunc(),
  *		 chip->legacy.{read,write}_{buf,byte,word}(),
- *		 chip->legacy.dev_ready() and chip->legacy.waifunc().
+ *		 chip->legacy.dev_ready() and chip->legacy.waitfunc().
  * @setup_interface: setup the data interface and timing. If chipnr is set to
  *		     %NAND_DATA_IFACE_CHECK_ONLY this means the configuration
  *		     should not be applied but only checked.
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index a3f8cdca90c8..cdcfe0fd2e7d 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -343,6 +343,12 @@ struct spi_nor_flash_parameter;
  * struct spi_nor - Structure for defining the SPI NOR layer
  * @mtd:		an mtd_info structure
  * @lock:		the lock for the read/write/erase/lock/unlock operations
+ * @rww:		Read-While-Write (RWW) sync lock
+ * @rww.wait:		wait queue for the RWW sync
+ * @rww.ongoing_io:	the bus is busy
+ * @rww.ongoing_rd:	a read is ongoing on the chip
+ * @rww.ongoing_pe:	a program/erase is ongoing on the chip
+ * @rww.used_banks:	bitmap of the banks in use
  * @dev:		pointer to an SPI device or an SPI NOR controller device
  * @spimem:		pointer to the SPI memory device
  * @bouncebuf:		bounce buffer used when the buffer passed by the MTD
@@ -376,6 +382,13 @@ struct spi_nor_flash_parameter;
 struct spi_nor {
 	struct mtd_info		mtd;
 	struct mutex		lock;
+	struct spi_nor_rww {
+		wait_queue_head_t wait;
+		bool		ongoing_io;
+		bool		ongoing_rd;
+		bool		ongoing_pe;
+		unsigned int	used_banks;
+	} rww;
 	struct device		*dev;
 	struct spi_mem		*spimem;
 	u8			*bouncebuf;
@@ -437,10 +450,4 @@ static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
 int spi_nor_scan(struct spi_nor *nor, const char *name,
 		 const struct spi_nor_hwcaps *hwcaps);
 
-/**
- * spi_nor_restore_addr_mode() - restore the status of SPI NOR
- * @nor:	the spi_nor structure
- */
-void spi_nor_restore(struct spi_nor *nor);
-
 #endif
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 01be9f0f008a..3e285c09d16d 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -262,6 +262,7 @@ struct spinand_manufacturer {
 /* SPI NAND manufacturers */
 extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
 extern const struct spinand_manufacturer ato_spinand_manufacturer;
+extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;