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authorThomas Gleixner <tglx@linutronix.de>2011-02-08 19:28:12 +0300
committerThomas Gleixner <tglx@linutronix.de>2011-02-19 14:58:20 +0300
commit876dbd4cc1b35c1a4cb96a2be1d43ea0eabce3b4 (patch)
tree9be1e7e4cd4a4c9fadd98a9ac637020417215521 /kernel/irq/chip.c
parent2bdd10558c8d93009cb6c32ce9e30800fbb08add (diff)
downloadlinux-876dbd4cc1b35c1a4cb96a2be1d43ea0eabce3b4.tar.xz
genirq: Mirror irq trigger type bits in irq_data.state
That's the data structure chip functions get provided. Also allow them to signal the core code that they updated the flags in irq_data.state by returning IRQ_SET_MASK_OK_NOCOPY. The default is unchanged. The type bits should be accessed via: val = irqd_get_trigger_type(irqdata); and irqd_set_trigger_type(irqdata, val); Coders who access them directly will be tracked down and slapped with stinking trouts. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'kernel/irq/chip.c')
-rw-r--r--kernel/irq/chip.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index b8aa3dfe8301..9c9b573a718e 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -710,11 +710,14 @@ void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
irq_settings_clr_and_set(desc, clr, set);
- irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU);
+ irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
+ IRQD_TRIGGER_MASK | IRQD_LEVEL);
if (irq_settings_has_no_balance_set(desc))
irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
if (irq_settings_is_per_cpu(desc))
irqd_set(&desc->irq_data, IRQD_PER_CPU);
+ irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
+
raw_spin_unlock_irqrestore(&desc->lock, flags);
}