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author | Anshuman Khandual <anshuman.khandual@arm.com> | 2023-09-21 06:36:30 +0300 |
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committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2023-11-16 14:35:06 +0300 |
commit | 94566c5b07744c7cf5c7cc0ad42b15996ba0b054 (patch) | |
tree | a5c652aac5e5d90c788aa156e4a842c54b9e6c8d /mm/interval_tree.c | |
parent | 4aff040bcc8de28bead01194cbca1dc9471a5a85 (diff) | |
download | linux-94566c5b07744c7cf5c7cc0ad42b15996ba0b054.tar.xz |
coresight: etm: Make cycle count threshold user configurable
When cycle counting is enabled, we use a default threshold value i.e 0x100
for the instruction trace cycle counting.
This patch makes the cycle threshold user configurable via perf event
attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
to the current default if unspecified.
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230921033631.1298723-3-anshuman.khandual@arm.com
Diffstat (limited to 'mm/interval_tree.c')
0 files changed, 0 insertions, 0 deletions