summaryrefslogtreecommitdiff
path: root/mm
diff options
context:
space:
mode:
authorDan Williams <dan.j.williams@intel.com>2022-06-07 20:35:39 +0300
committerDan Williams <dan.j.williams@intel.com>2022-07-22 03:19:25 +0300
commit7f8faf96a2fb562833db73595640329ca8da7b1d (patch)
treeaa1d56a296dd10cf81a951324fe07594e9773722 /mm
parent538831f1beb818c93e5879bf19de37d89ec88ed6 (diff)
downloadlinux-7f8faf96a2fb562833db73595640329ca8da7b1d.tar.xz
cxl/mem: Enumerate port targets before adding endpoints
The port scanning algorithm in devm_cxl_enumerate_ports() walks up the topology and adds cxl_port objects starting from the root down to the endpoint. When those ports are initially created they know all their dports, but they do not know the downstream cxl_port instance that represents the next descendant in the topology. Rework create_endpoint() into devm_cxl_add_endpoint() that enumerates the downstream cxl_port topology into each port's 'struct cxl_ep' record for each endpoint it that the port is an ancestor. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220624041950.559155-7-dan.j.williams@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions