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| author | Grygorii Strashko <grygorii.strashko@ti.com> | 2020-06-26 21:17:09 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-06-30 03:06:19 +0300 |
| commit | 38389aa6ba82b8d598fdb02f8907eca132ec2c1b (patch) | |
| tree | adc2ecf4f16e92f498a027e098b334d12ed5ca32 /net/sched/sch_drr.c | |
| parent | 3d0fda901c058844bcd72bc6098c6c86884d1877 (diff) | |
| download | linux-38389aa6ba82b8d598fdb02f8907eca132ec2c1b.tar.xz | |
net: ethernet: ti: am65-cpsw-nuss: enable am65x sr2.0 support
The AM65x SR2.0 MCU CPSW has fixed errata i2027 "CPSW: CPSW Does Not
Support CPPI Receive Checksum (Host to Ethernet) Offload Feature". This
errata also fixed for J271E SoC.
Use SOC bus data for K3 SoC identification and apply i2027 errata w/a only
for the AM65x SR1.0 SoC.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/sched/sch_drr.c')
0 files changed, 0 insertions, 0 deletions