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| author | Guangguan Wang <guangguan.wang@linux.alibaba.com> | 2022-07-14 12:44:01 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-07-18 13:19:17 +0300 |
| commit | 0ef69e788411cba2af017db731a9fc62d255e9ac (patch) | |
| tree | 4eef442d258216d382747071b839592992519931 /net/smc/smc_ib.c | |
| parent | 6d52e2de6415b7a035b3e8dc4ccffd0da25bbfb9 (diff) | |
| download | linux-0ef69e788411cba2af017db731a9fc62d255e9ac.tar.xz | |
net/smc: optimize for smc_sndbuf_sync_sg_for_device and smc_rmb_sync_sg_for_cpu
Some CPU, such as Xeon, can guarantee DMA cache coherency.
So it is no need to use dma sync APIs to flush cache on such CPUs.
In order to avoid calling dma sync APIs on the IO path, use the
dma_need_sync to check whether smc_buf_desc needs dma sync when
creating smc_buf_desc.
Signed-off-by: Guangguan Wang <guangguan.wang@linux.alibaba.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/smc/smc_ib.c')
| -rw-r--r-- | net/smc/smc_ib.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/net/smc/smc_ib.c b/net/smc/smc_ib.c index dcda4165d107..60e5095890b1 100644 --- a/net/smc/smc_ib.c +++ b/net/smc/smc_ib.c @@ -729,6 +729,29 @@ int smc_ib_get_memory_region(struct ib_pd *pd, int access_flags, return 0; } +bool smc_ib_is_sg_need_sync(struct smc_link *lnk, + struct smc_buf_desc *buf_slot) +{ + struct scatterlist *sg; + unsigned int i; + bool ret = false; + + /* for now there is just one DMA address */ + for_each_sg(buf_slot->sgt[lnk->link_idx].sgl, sg, + buf_slot->sgt[lnk->link_idx].nents, i) { + if (!sg_dma_len(sg)) + break; + if (dma_need_sync(lnk->smcibdev->ibdev->dma_device, + sg_dma_address(sg))) { + ret = true; + goto out; + } + } + +out: + return ret; +} + /* synchronize buffer usage for cpu access */ void smc_ib_sync_sg_for_cpu(struct smc_link *lnk, struct smc_buf_desc *buf_slot, @@ -737,6 +760,9 @@ void smc_ib_sync_sg_for_cpu(struct smc_link *lnk, struct scatterlist *sg; unsigned int i; + if (!(buf_slot->is_dma_need_sync & (1U << lnk->link_idx))) + return; + /* for now there is just one DMA address */ for_each_sg(buf_slot->sgt[lnk->link_idx].sgl, sg, buf_slot->sgt[lnk->link_idx].nents, i) { @@ -757,6 +783,9 @@ void smc_ib_sync_sg_for_device(struct smc_link *lnk, struct scatterlist *sg; unsigned int i; + if (!(buf_slot->is_dma_need_sync & (1U << lnk->link_idx))) + return; + /* for now there is just one DMA address */ for_each_sg(buf_slot->sgt[lnk->link_idx].sgl, sg, buf_slot->sgt[lnk->link_idx].nents, i) { |