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authorHeikki Krogerus <heikki.krogerus@linux.intel.com>2014-05-23 17:15:09 +0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2014-05-25 16:40:28 +0400
commitc78b0830667a7e7c1f0ca65b76b33166a84806b3 (patch)
treee49dbc23ff2132c95842342a3010c464300b70a9 /scripts/headers_check.pl
parent4cf563c5d97c83d4b2fb3a778dd7d5e362cc3e34 (diff)
downloadlinux-c78b0830667a7e7c1f0ca65b76b33166a84806b3.tar.xz
ACPI / LPSS: custom power domain for LPSS
A power domain where we save the context of the additional LPSS registers. We need to do this or all LPSS devices are left in reset state when resuming from D3 on some Baytrails. The devices with the fractional clock divider also have zeros for N and M values after resuming unless they are reset. Li Aubrey found the root cause for the issue. The idea of using power domain for LPSS came from Mika Westerberg. Reported-by: Jin Yao <yao.jin@linux.intel.com> Suggested-by: Li Aubrey <aubrey.li@linux.intel.com> Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> [rjw: Added the .complete() callback to the PM domain, fixed build warning on 32-bit.] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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