diff options
| author | Richard Fitzgerald <rf@opensource.cirrus.com> | 2021-11-16 19:39:01 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-11-17 16:04:46 +0300 |
| commit | bbf0e1d36519a5cd2c08dc1348f997cd5240eb2e (patch) | |
| tree | 87ade609ede7824446841a7528d8c23b9b4e9118 /sound/soc/codecs/cs42l42.c | |
| parent | 3edde6de090617adea18f2068489086c0d8087e3 (diff) | |
| download | linux-bbf0e1d36519a5cd2c08dc1348f997cd5240eb2e.tar.xz | |
ASoC: cs42l42: Remove redundant pll_divout member
Now that struct cs42l42_private has pll_config, the current PLL
configuration can be looked up directly in pll_ratio_table. This
makes the pll_divout member of cs42l42_private redundant since it
was only a copy of the value from pll_ratio_table.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211116163901.45390-5-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/cs42l42.c')
| -rw-r--r-- | sound/soc/codecs/cs42l42.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index 8efcee3e60d3..0c4303547fd8 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -734,10 +734,6 @@ static int cs42l42_pll_config(struct snd_soc_component *component) CS42L42_PLL_DIVOUT_MASK, (pll_ratio_table[i].pll_divout * pll_ratio_table[i].n) << CS42L42_PLL_DIVOUT_SHIFT); - if (pll_ratio_table[i].n != 1) - cs42l42->pll_divout = pll_ratio_table[i].pll_divout; - else - cs42l42->pll_divout = 0; snd_soc_component_update_bits(component, CS42L42_PLL_CAL_RATIO, CS42L42_PLL_CAL_RATIO_MASK, @@ -1004,12 +1000,13 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, CS42L42_PLL_START_MASK, 1); - if (cs42l42->pll_divout) { + if (pll_ratio_table[cs42l42->pll_config].n > 1) { usleep_range(CS42L42_PLL_DIVOUT_TIME_US, CS42L42_PLL_DIVOUT_TIME_US * 2); + regval = pll_ratio_table[cs42l42->pll_config].pll_divout; snd_soc_component_update_bits(component, CS42L42_PLL_CTL3, CS42L42_PLL_DIVOUT_MASK, - cs42l42->pll_divout << + regval << CS42L42_PLL_DIVOUT_SHIFT); } |