diff options
| author | Trevor Wu <trevor.wu@mediatek.com> | 2021-08-19 11:41:35 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-08-24 21:13:52 +0300 |
| commit | d62ad762f67585acfb5e03f71b28a52dc4604cf2 (patch) | |
| tree | e19fd3310e65b175170de370c3bc0d604e8f7dea /sound/soc/mediatek/mt8195/mt8195-audsys-clk.h | |
| parent | cab2b9e5fc0e868ed8453ef4f433c795bda8bf84 (diff) | |
| download | linux-d62ad762f67585acfb5e03f71b28a52dc4604cf2.tar.xz | |
ASoC: mediatek: mt8195: support audsys clock control
This patch adds mt8195 audio cg control.
Audio clock gates are registered to CCF for reference count and
clock parent management.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20210819084144.18483-3-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/mediatek/mt8195/mt8195-audsys-clk.h')
| -rw-r--r-- | sound/soc/mediatek/mt8195/mt8195-audsys-clk.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/sound/soc/mediatek/mt8195/mt8195-audsys-clk.h b/sound/soc/mediatek/mt8195/mt8195-audsys-clk.h new file mode 100644 index 000000000000..239d31016ba7 --- /dev/null +++ b/sound/soc/mediatek/mt8195/mt8195-audsys-clk.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * mt8195-audsys-clk.h -- Mediatek 8195 audsys clock definition + * + * Copyright (c) 2021 MediaTek Inc. + * Author: Trevor Wu <trevor.wu@mediatek.com> + */ + +#ifndef _MT8195_AUDSYS_CLK_H_ +#define _MT8195_AUDSYS_CLK_H_ + +int mt8195_audsys_clk_register(struct mtk_base_afe *afe); +void mt8195_audsys_clk_unregister(struct mtk_base_afe *afe); + +#endif |