diff options
| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2019-06-03 19:20:31 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-06-03 19:49:17 +0300 |
| commit | 09a173a63fbb89762712a4ec48722ba98d4e1bcc (patch) | |
| tree | 507593f356981fb9361594a0f0ee7a63285d51f3 /sound/soc/sof/intel/cnl.c | |
| parent | 66e65339b824a597a8c750ddf993af17c847dce6 (diff) | |
| download | linux-09a173a63fbb89762712a4ec48722ba98d4e1bcc.tar.xz | |
ASoC: SOF: Intel: ipc: don't check for HIPCCTL register value
The HIPCCTL register controls the IPC interrupts. It can be set or
cleared to mask or enable these interrupts, but it makes no sense to
read and test its fields in an interrupt (which can only executed if
its fields are set).
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/sof/intel/cnl.c')
| -rw-r--r-- | sound/soc/sof/intel/cnl.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/sound/soc/sof/intel/cnl.c b/sound/soc/sof/intel/cnl.c index b794a881542f..9a4927b6b6ae 100644 --- a/sound/soc/sof/intel/cnl.c +++ b/sound/soc/sof/intel/cnl.c @@ -31,7 +31,6 @@ static irqreturn_t cnl_ipc_irq_thread(int irq, void *context) { struct snd_sof_dev *sdev = context; u32 hipci; - u32 hipcctl; u32 hipcida; u32 hipctdr; u32 hipctdd; @@ -40,14 +39,12 @@ static irqreturn_t cnl_ipc_irq_thread(int irq, void *context) bool ipc_irq = false; hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDA); - hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCCTL); hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR); hipctdd = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDD); hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDR); /* reply message from DSP */ - if (hipcida & CNL_DSP_REG_HIPCIDA_DONE && - hipcctl & CNL_DSP_REG_HIPCCTL_DONE) { + if (hipcida & CNL_DSP_REG_HIPCIDA_DONE) { msg_ext = hipci & CNL_DSP_REG_HIPCIDR_MSG_MASK; msg = hipcida & CNL_DSP_REG_HIPCIDA_MSG_MASK; |