diff options
| author | Arnaldo Carvalho de Melo <acme@redhat.com> | 2023-09-13 14:50:10 +0300 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2024-04-23 20:16:08 +0300 |
| commit | b29781afaed29d5e41557231c46abd25bdc8d0c4 (patch) | |
| tree | 96ff6d77acab65cc2aec99527a683bf55374a5f7 /tools/arch | |
| parent | e7a8074d2f62c7c571e1e794f6eb2c90f68c514e (diff) | |
| download | linux-b29781afaed29d5e41557231c46abd25bdc8d0c4.tar.xz | |
tools arch x86: Sync the msr-index.h copy with the kernel sources
To pick up the changes from these csets:
be482ff9500999f5 ("x86/bhi: Enumerate Branch History Injection (BHI) bug")
0f4a837615ff925b ("x86/bhi: Define SPEC_CTRL_BHI_DIS_S")
That cause no changes to tooling:
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > x86_msr.before
$ objdump -dS /tmp/build/perf-tools-next/util/amd-sample-raw.o > amd-sample-raw.o.before
$ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h
$ make -C tools/perf O=/tmp/build/perf-tools-next
<SNIP>
CC /tmp/build/perf-tools-next/trace/beauty/tracepoints/x86_msr.o
<SNIP>
CC /tmp/build/perf-tools-next/util/amd-sample-raw.o
<SNIP>
$ objdump -dS /tmp/build/perf-tools-next/util/amd-sample-raw.o > amd-sample-raw.o.after
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > x86_msr.after
$ diff -u x86_msr.before x86_msr.after
$ diff -u amd-sample-raw.o.before amd-sample-raw.o.after
Just silences this perf build warning:
Warning: Kernel ABI header differences:
diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Daniel Sneddon <daniel.sneddon@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/lkml/ZifCnEZFx5MZQuIW@x1
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/arch')
| -rw-r--r-- | tools/arch/x86/include/asm/msr-index.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h index 05956bd8bacf..e72c2b872957 100644 --- a/tools/arch/x86/include/asm/msr-index.h +++ b/tools/arch/x86/include/asm/msr-index.h @@ -61,10 +61,13 @@ #define SPEC_CTRL_SSBD BIT(SPEC_CTRL_SSBD_SHIFT) /* Speculative Store Bypass Disable */ #define SPEC_CTRL_RRSBA_DIS_S_SHIFT 6 /* Disable RRSBA behavior */ #define SPEC_CTRL_RRSBA_DIS_S BIT(SPEC_CTRL_RRSBA_DIS_S_SHIFT) +#define SPEC_CTRL_BHI_DIS_S_SHIFT 10 /* Disable Branch History Injection behavior */ +#define SPEC_CTRL_BHI_DIS_S BIT(SPEC_CTRL_BHI_DIS_S_SHIFT) /* A mask for bits which the kernel toggles when controlling mitigations */ #define SPEC_CTRL_MITIGATIONS_MASK (SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | SPEC_CTRL_SSBD \ - | SPEC_CTRL_RRSBA_DIS_S) + | SPEC_CTRL_RRSBA_DIS_S \ + | SPEC_CTRL_BHI_DIS_S) #define MSR_IA32_PRED_CMD 0x00000049 /* Prediction Command */ #define PRED_CMD_IBPB BIT(0) /* Indirect Branch Prediction Barrier */ @@ -163,6 +166,10 @@ * are restricted to targets in * kernel. */ +#define ARCH_CAP_BHI_NO BIT(20) /* + * CPU is not affected by Branch + * History Injection. + */ #define ARCH_CAP_PBRSB_NO BIT(24) /* * Not susceptible to Post-Barrier * Return Stack Buffer Predictions. |