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| author | Willy Tarreau <w@1wt.eu> | 2022-07-20 00:44:32 +0300 |
|---|---|---|
| committer | Paul E. McKenney <paulmck@kernel.org> | 2022-08-31 15:17:43 +0300 |
| commit | a30d551f34df66d739949a6140b50496afa36f66 (patch) | |
| tree | a2ca04a346e3e6f3d74ead0636f24bbab554e48c /tools/include/nolibc | |
| parent | 568035b01cfb107af8d2e4bd2fb9aea22cf5b868 (diff) | |
| download | linux-a30d551f34df66d739949a6140b50496afa36f66.tar.xz | |
tools/nolibc: make argc 32-bit in riscv startup code
The "ld a0, 0(sp)" instruction doesn't build on RISCV32 because that
would load a 64-bit value into a 32-bit register. But argc 32-bit,
not 64, so we ought to use "lw" here. Tested on both RISCV32 and
RISCV64.
Cc: Pranith Kumar <bobby.prani@gmail.com>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Diffstat (limited to 'tools/include/nolibc')
| -rw-r--r-- | tools/include/nolibc/arch-riscv.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/include/nolibc/arch-riscv.h b/tools/include/nolibc/arch-riscv.h index 95e2b7924925..ba04771cb3a3 100644 --- a/tools/include/nolibc/arch-riscv.h +++ b/tools/include/nolibc/arch-riscv.h @@ -190,7 +190,7 @@ __asm__ (".section .text\n" ".option norelax\n" "lla gp, __global_pointer$\n" ".option pop\n" - "ld a0, 0(sp)\n" // argc (a0) was in the stack + "lw a0, 0(sp)\n" // argc (a0) was in the stack "add a1, sp, "SZREG"\n" // argv (a1) = sp "slli a2, a0, "PTRLOG"\n" // envp (a2) = SZREG*argc ... "add a2, a2, "SZREG"\n" // + SZREG (skip null) |