diff options
| author | Sean V Kelley <seanvk.dev@oregontracks.org> | 2018-08-03 07:18:11 +0300 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2018-08-08 21:55:43 +0300 |
| commit | 704089e77acf74b17ed294683660937000ecb9ee (patch) | |
| tree | 0b0e0081b9471a8f56ca2f21e666ef331953a7bf /tools/perf/pmu-events | |
| parent | 33d9e1832e528ff61f481558882ee0f82e288440 (diff) | |
| download | linux-704089e77acf74b17ed294683660937000ecb9ee.tar.xz | |
perf vendor events arm64: Enable JSON events for eMAG
This patch adds the Ampere Computing eMAG file. This platform follows
the ARMv8 recommended IMPLEMENTATION DEFINED events, where applicable.
Signed-off-by: Sean V Kelley <seanvk.dev@oregontracks.org>
Reviewed-by: John Garry <john.garry@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: William Cohen <wcohen@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
LPU-Reference: 20180803041811.17065-1-seanvk.dev@oregontracks.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/pmu-events')
| -rw-r--r-- | tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json | 32 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 |
2 files changed, 33 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json new file mode 100644 index 000000000000..bc03c06c3918 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json @@ -0,0 +1,32 @@ +[ + { + "ArchStdEvent": "L1D_CACHE_RD", + }, + { + "ArchStdEvent": "L1D_CACHE_WR", + }, + { + "ArchStdEvent": "L1D_CACHE_REFILL_RD", + }, + { + "ArchStdEvent": "L1D_CACHE_REFILL_WR", + }, + { + "ArchStdEvent": "L1D_TLB_REFILL_RD", + }, + { + "ArchStdEvent": "L1D_TLB_REFILL_WR", + }, + { + "ArchStdEvent": "L1D_TLB_RD", + }, + { + "ArchStdEvent": "L1D_TLB_WR", + }, + { + "ArchStdEvent": "BUS_ACCESS_RD", + }, + { + "ArchStdEvent": "BUS_ACCESS_WR", + } +] diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv index f03e26ecb658..59cd8604b0bd 100644 --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv @@ -16,3 +16,4 @@ 0x00000000420f5160,v1,cavium/thunderx2,core 0x00000000430f0af0,v1,cavium/thunderx2,core 0x00000000480fd010,v1,hisilicon/hip08,core +0x00000000500f0000,v1,ampere/emag,core |