diff options
| author | Ian Rogers <irogers@google.com> | 2023-03-29 02:41:42 +0300 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2023-04-04 15:39:56 +0300 |
| commit | 319593215260da74a78c7de1dccd877ea13916fb (patch) | |
| tree | b5cac21b26b5f1ce60b0e19cbde2992006d4c205 /tools/perf | |
| parent | 337fa2db04785c60fc3aa736af98ce8358f87d34 (diff) | |
| download | linux-319593215260da74a78c7de1dccd877ea13916fb.tar.xz | |
perf vendor events intel: Update ivybridge and ivytown
Update to versions 24 and 23 respectively. Adds the event
BR_MISP_EXEC.INDIRECT.
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20230328234142.1080045-1-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 8 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/ivytown/pipeline.json | 8 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/mapfile.csv | 4 |
3 files changed, 18 insertions, 2 deletions
diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json index d1e64e0d683e..30a3da9cd22b 100644 --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json @@ -216,6 +216,14 @@ "UMask": "0xc4" }, { + "BriefDescription": "Speculative mispredicted indirect branches", + "EventCode": "0x89", + "EventName": "BR_MISP_EXEC.INDIRECT", + "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).", + "SampleAfterValue": "200003", + "UMask": "0xe4" + }, + { "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.NONTAKEN_CONDITIONAL", diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json index d1e64e0d683e..30a3da9cd22b 100644 --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json @@ -216,6 +216,14 @@ "UMask": "0xc4" }, { + "BriefDescription": "Speculative mispredicted indirect branches", + "EventCode": "0x89", + "EventName": "BR_MISP_EXEC.INDIRECT", + "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).", + "SampleAfterValue": "200003", + "UMask": "0xe4" + }, + { "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches", "EventCode": "0x89", "EventName": "BR_MISP_EXEC.NONTAKEN_CONDITIONAL", diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv index 41d755d570e6..97b3ffc284a6 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -14,8 +14,8 @@ GenuineIntel-6-(3C|45|46),v33,haswell,core GenuineIntel-6-3F,v27,haswellx,core GenuineIntel-6-(7D|7E|A7),v1.17,icelake,core GenuineIntel-6-6[AC],v1.19,icelakex,core -GenuineIntel-6-3A,v23,ivybridge,core -GenuineIntel-6-3E,v22,ivytown,core +GenuineIntel-6-3A,v24,ivybridge,core +GenuineIntel-6-3E,v23,ivytown,core GenuineIntel-6-2D,v23,jaketown,core GenuineIntel-6-(57|85),v10,knightslanding,core GenuineIntel-6-A[AC],v1.01,meteorlake,core |