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authorDave Jiang <dave.jiang@intel.com>2023-02-14 22:41:30 +0300
committerDan Williams <dan.j.williams@intel.com>2023-02-15 02:45:21 +0300
commit4474ce565ee4490fb4e6d8443b617a9d98ae10ff (patch)
tree6e95405cb64326700e8af5863425cc9e4ce494d7 /tools/testing/cxl/test/cxl.c
parentb777e9bec960a29374dc486d47784c73b7ac4cef (diff)
downloadlinux-4474ce565ee4490fb4e6d8443b617a9d98ae10ff.tar.xz
cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders
CXL rev3 spec 8.1.3 RCDs may not have HDM register blocks. Create a fake HDM with information from the CXL PCIe DVSEC registers. The decoder count will be set to the HDM count retrieved from the DVSEC cap register. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/167640368994.935665.15831225724059704620.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl/test/cxl.c')
-rw-r--r--tools/testing/cxl/test/cxl.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 3b4916adf29c..94197abd44aa 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -618,7 +618,8 @@ static struct acpi_pci_root *mock_acpi_pci_find_root(acpi_handle handle)
return &mock_pci_root[host_bridge_index(adev)];
}
-static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port)
+static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port,
+ struct cxl_endpoint_dvsec_info *info)
{
struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), GFP_KERNEL);