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| author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 22:41:24 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-15 02:45:21 +0300 |
| commit | b777e9bec960a29374dc486d47784c73b7ac4cef (patch) | |
| tree | 0d44be3bf53ba1d04929297e5955f380c26c59f6 /tools/testing/cxl/test/cxl.c | |
| parent | 9de321e93c3b3fd7fd2621a2557c42fa7d43e314 (diff) | |
| download | linux-b777e9bec960a29374dc486d47784c73b7ac4cef.tar.xz | |
cxl/hdm: Emulate HDM decoder from DVSEC range registers
In the case where HDM decoder register block exists but is not programmed
and at the same time the DVSEC range register range is active, populate the
CXL decoder object 'cxl_decoder' with info from DVSEC range registers.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640368454.935665.13806415120298330717.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl/test/cxl.c')
| -rw-r--r-- | tools/testing/cxl/test/cxl.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 30ee680d38ff..3b4916adf29c 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -701,7 +701,8 @@ static int mock_decoder_reset(struct cxl_decoder *cxld) return 0; } -static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm) +static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm, + struct cxl_endpoint_dvsec_info *info) { struct cxl_port *port = cxlhdm->port; struct cxl_port *parent_port = to_cxl_port(port->dev.parent); |