diff options
-rw-r--r-- | Documentation/fpga/dfl.rst | 5 | ||||
-rw-r--r-- | MAINTAINERS | 2 | ||||
-rw-r--r-- | drivers/fpga/Makefile | 6 | ||||
-rw-r--r-- | drivers/fpga/dfl-pci.c | 9 | ||||
-rw-r--r-- | drivers/fpga/dfl.c | 38 | ||||
-rw-r--r-- | drivers/fpga/dfl.h | 1 | ||||
-rw-r--r-- | drivers/fpga/fpga-mgr.c | 13 | ||||
-rw-r--r-- | drivers/fpga/fpga-region.c | 6 | ||||
-rw-r--r-- | drivers/fpga/of-fpga-region.c | 22 | ||||
-rw-r--r-- | include/linux/fpga/fpga-region.h | 6 |
10 files changed, 68 insertions, 40 deletions
diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index ef9eec71f6f3..15b670926084 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -502,6 +502,11 @@ Developer only needs to provide a sub feature driver with matched feature id. FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) could be a reference. +Please refer to below link to existing feature id table and guide for new feature +ids application. +https://github.com/OPAE/dfl-feature-id + + Location of DFLs on a PCI Device ================================ The original method for finding a DFL on a PCI device assumed the start of the diff --git a/MAINTAINERS b/MAINTAINERS index 82bcec23ee2e..4c8b20d93a10 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7732,7 +7732,7 @@ R: Tom Rix <trix@redhat.com> L: linux-fpga@vger.kernel.org S: Maintained Q: http://patchwork.kernel.org/project/linux-fpga/list/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga.git F: Documentation/devicetree/bindings/fpga/ F: Documentation/driver-api/fpga/ F: Documentation/fpga/ diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 0bff783d1b61..5935b3d0abd5 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -18,9 +18,9 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o -obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o -obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o -obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o +obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o +obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o # FPGA Bridge Drivers obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c index 717ac9715970..fd1fa55c9113 100644 --- a/drivers/fpga/dfl-pci.c +++ b/drivers/fpga/dfl-pci.c @@ -259,6 +259,15 @@ static int find_dfls_by_default(struct pci_dev *pcidev, */ bar = FIELD_GET(FME_PORT_OFST_BAR_ID, v); offset = FIELD_GET(FME_PORT_OFST_DFH_OFST, v); + if (bar == FME_PORT_OFST_BAR_SKIP) { + continue; + } else if (bar >= PCI_STD_NUM_BARS) { + dev_err(&pcidev->dev, "bad BAR %d for port %d\n", + bar, i); + ret = -EINVAL; + break; + } + start = pci_resource_start(pcidev, bar) + offset; len = pci_resource_len(pcidev, bar) - offset; diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 599bb21d86af..6bff39ff21a0 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -940,9 +940,12 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo, { void __iomem *base = binfo->ioaddr + ofst; unsigned int i, ibase, inr = 0; + enum dfl_id_type type; int virq; u64 v; + type = feature_dev_id_type(binfo->feature_dev); + /* * Ideally DFL framework should only read info from DFL header, but * current version DFL only provides mmio resources information for @@ -957,22 +960,25 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo, * code will be added. But in order to be compatible to old version * DFL, the driver may still fall back to these quirks. */ - switch (fid) { - case PORT_FEATURE_ID_UINT: - v = readq(base + PORT_UINT_CAP); - ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v); - inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v); - break; - case PORT_FEATURE_ID_ERROR: - v = readq(base + PORT_ERROR_CAP); - ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v); - inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v); - break; - case FME_FEATURE_ID_GLOBAL_ERR: - v = readq(base + FME_ERROR_CAP); - ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v); - inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v); - break; + if (type == PORT_ID) { + switch (fid) { + case PORT_FEATURE_ID_UINT: + v = readq(base + PORT_UINT_CAP); + ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v); + inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v); + break; + case PORT_FEATURE_ID_ERROR: + v = readq(base + PORT_ERROR_CAP); + ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v); + inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v); + break; + } + } else if (type == FME_ID) { + if (fid == FME_FEATURE_ID_GLOBAL_ERR) { + v = readq(base + FME_ERROR_CAP); + ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v); + inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v); + } } if (!inr) { diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 53572c7aced0..06cfcd5e84bb 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -89,6 +89,7 @@ #define FME_HDR_NEXT_AFU NEXT_AFU #define FME_HDR_CAP 0x30 #define FME_HDR_PORT_OFST(n) (0x38 + ((n) * 0x8)) +#define FME_PORT_OFST_BAR_SKIP 7 #define FME_HDR_BITSTREAM_ID 0x60 #define FME_HDR_BITSTREAM_MD 0x68 diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index d49a9ce34568..a3595ecc3f79 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -148,11 +148,12 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, int ret; mgr->state = FPGA_MGR_STATE_WRITE_INIT; - if (!mgr->mops->initial_header_size) + if (!mgr->mops->initial_header_size) { ret = fpga_mgr_write_init(mgr, info, NULL, 0); - else - ret = fpga_mgr_write_init( - mgr, info, buf, min(mgr->mops->initial_header_size, count)); + } else { + count = min(mgr->mops->initial_header_size, count); + ret = fpga_mgr_write_init(mgr, info, buf, count); + } if (ret) { dev_err(&mgr->dev, "Error preparing FPGA for writing\n"); @@ -730,6 +731,8 @@ static void devm_fpga_mgr_unregister(struct device *dev, void *res) * @parent: fpga manager device from pdev * @info: parameters for fpga manager * + * Return: fpga manager pointer on success, negative error code otherwise. + * * This is the devres variant of fpga_mgr_register_full() for which the unregister * function will be called automatically when the managing device is detached. */ @@ -763,6 +766,8 @@ EXPORT_SYMBOL_GPL(devm_fpga_mgr_register_full); * @mops: pointer to structure of fpga manager ops * @priv: fpga manager private data * + * Return: fpga manager pointer on success, negative error code otherwise. + * * This is the devres variant of fpga_mgr_register() for which the * unregister function will be called automatically when the managing * device is detached. diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c index b0ac18de4885..485948e3c0db 100644 --- a/drivers/fpga/fpga-region.c +++ b/drivers/fpga/fpga-region.c @@ -18,9 +18,9 @@ static DEFINE_IDA(fpga_region_ida); static struct class *fpga_region_class; -struct fpga_region *fpga_region_class_find( - struct device *start, const void *data, - int (*match)(struct device *, const void *)) +struct fpga_region * +fpga_region_class_find(struct device *start, const void *data, + int (*match)(struct device *, const void *)) { struct device *dev; diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c index 50b83057c048..ae82532fc127 100644 --- a/drivers/fpga/of-fpga-region.c +++ b/drivers/fpga/of-fpga-region.c @@ -28,7 +28,7 @@ MODULE_DEVICE_TABLE(of, fpga_region_of_match); * * Caller will need to put_device(®ion->dev) when done. * - * Returns FPGA Region struct or NULL + * Return: FPGA Region struct or NULL */ static struct fpga_region *of_fpga_region_find(struct device_node *np) { @@ -80,7 +80,7 @@ static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np) * Caller should call fpga_bridges_put(®ion->bridge_list) when * done with the bridges. * - * Return 0 for success (even if there are no bridges specified) + * Return: 0 for success (even if there are no bridges specified) * or -EBUSY if any of the bridges are in use. */ static int of_fpga_region_get_bridges(struct fpga_region *region) @@ -139,13 +139,13 @@ static int of_fpga_region_get_bridges(struct fpga_region *region) } /** - * child_regions_with_firmware + * child_regions_with_firmware - Used to check the child region info. * @overlay: device node of the overlay * * If the overlay adds child FPGA regions, they are not allowed to have * firmware-name property. * - * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name. + * Return: 0 for OK or -EINVAL if child FPGA region adds firmware-name. */ static int child_regions_with_firmware(struct device_node *overlay) { @@ -184,14 +184,14 @@ static int child_regions_with_firmware(struct device_node *overlay) * Given an overlay applied to an FPGA region, parse the FPGA image specific * info in the overlay and do some checking. * - * Returns: + * Return: * NULL if overlay doesn't direct us to program the FPGA. * fpga_image_info struct if there is an image to program. * error code for invalid overlay. */ -static struct fpga_image_info *of_fpga_region_parse_ov( - struct fpga_region *region, - struct device_node *overlay) +static struct fpga_image_info * +of_fpga_region_parse_ov(struct fpga_region *region, + struct device_node *overlay) { struct device *dev = ®ion->dev; struct fpga_image_info *info; @@ -279,7 +279,7 @@ ret_no_info: * If the checks fail, overlay is rejected and does not get added to the * live tree. * - * Returns 0 for success or negative error code for failure. + * Return: 0 for success or negative error code for failure. */ static int of_fpga_region_notify_pre_apply(struct fpga_region *region, struct of_overlay_notify_data *nd) @@ -339,7 +339,7 @@ static void of_fpga_region_notify_post_remove(struct fpga_region *region, * This notifier handles programming an FPGA when a "firmware-name" property is * added to an fpga-region. * - * Returns NOTIFY_OK or error if FPGA programming fails. + * Return: NOTIFY_OK or error if FPGA programming fails. */ static int of_fpga_region_notify(struct notifier_block *nb, unsigned long action, void *arg) @@ -446,6 +446,8 @@ static struct platform_driver of_fpga_region_driver = { /** * of_fpga_region_init - init function for fpga_region class * Creates the fpga_region class and registers a reconfig notifier. + * + * Return: 0 on success, negative error code otherwise. */ static int __init of_fpga_region_init(void) { diff --git a/include/linux/fpga/fpga-region.h b/include/linux/fpga/fpga-region.h index 3b87f232425c..9d4d32909340 100644 --- a/include/linux/fpga/fpga-region.h +++ b/include/linux/fpga/fpga-region.h @@ -52,9 +52,9 @@ struct fpga_region { #define to_fpga_region(d) container_of(d, struct fpga_region, dev) -struct fpga_region *fpga_region_class_find( - struct device *start, const void *data, - int (*match)(struct device *, const void *)); +struct fpga_region * +fpga_region_class_find(struct device *start, const void *data, + int (*match)(struct device *, const void *)); int fpga_region_program_fpga(struct fpga_region *region); |