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-rw-r--r--arch/arm64/boot/dts/mediatek/mt8183.dtsi26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 41654530e165..980ff3e8c1c5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1183,22 +1183,10 @@
status = "disabled";
};
- svs: svs@1100b000 {
- compatible = "mediatek,mt8183-svs";
- reg = <0 0x1100b000 0 0x1000>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&infracfg CLK_INFRA_THERM>;
- clock-names = "main";
- nvmem-cells = <&svs_calibration>,
- <&thermal_calibration>;
- nvmem-cell-names = "svs-calibration-data",
- "t-calibration-data";
- };
-
thermal: thermal@1100b000 {
#thermal-sensor-cells = <1>;
compatible = "mediatek,mt8183-thermal";
- reg = <0 0x1100b000 0 0x1000>;
+ reg = <0 0x1100b000 0 0xc00>;
clocks = <&infracfg CLK_INFRA_THERM>,
<&infracfg CLK_INFRA_AUXADC>;
clock-names = "therm", "auxadc";
@@ -1210,6 +1198,18 @@
nvmem-cell-names = "calibration-data";
};
+ svs: svs@1100bc00 {
+ compatible = "mediatek,mt8183-svs";
+ reg = <0 0x1100bc00 0 0x400>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_THERM>;
+ clock-names = "main";
+ nvmem-cells = <&svs_calibration>,
+ <&thermal_calibration>;
+ nvmem-cell-names = "svs-calibration-data",
+ "t-calibration-data";
+ };
+
thermal_zones: thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <100>;