diff options
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
4 files changed, 138 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/fixed-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-clock.yaml index b0a4fb8256e2..90fb10660684 100644 --- a/Documentation/devicetree/bindings/clock/fixed-clock.yaml +++ b/Documentation/devicetree/bindings/clock/fixed-clock.yaml @@ -11,6 +11,15 @@ maintainers: - Stephen Boyd <sboyd@kernel.org> properties: + $nodename: + anyOf: + - description: + Preferred name is 'clock-<freq>' with <freq> being the output + frequency as defined in the 'clock-frequency' property. + pattern: "^clock-([0-9]+|[a-z0-9-]+)$" + - description: Any name allowed + deprecated: true + compatible: const: fixed-clock diff --git a/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml index 8f71ab300470..4afdb1c98f5f 100644 --- a/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml +++ b/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml @@ -11,6 +11,15 @@ maintainers: - Stephen Boyd <sboyd@kernel.org> properties: + $nodename: + anyOf: + - description: + If the frequency is fixed, the preferred name is 'clock-<freq>' with + <freq> being the output frequency. + pattern: "^clock-([0-9]+|[0-9a-z-]+)$" + - description: Any name allowed + deprecated: true + compatible: enum: - fixed-factor-clock diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml new file mode 100644 index 000000000000..2dffc02dcd8b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - enum: + - nxp,imx95-lvds-csr + - nxp,imx95-display-csr + - nxp,imx95-camera-csr + - nxp,imx95-vpu-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + +required: + - compatible + - reg + - '#clock-cells' + - power-domains + - clocks + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-vpu-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 114>; + power-domains = <&scmi_devpd 21>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml new file mode 100644 index 000000000000..07f7412e7658 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Display Master Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - const: nxp,imx95-display-master-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + + mux-controller: + type: object + $ref: /schemas/mux/reg-mux.yaml + +required: + - compatible + - reg + - '#clock-cells' + - mux-controller + - power-domains + - clocks + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-display-master-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 62>; + power-domains = <&scmi_devpd 3>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */ + idle-states = <0>; + }; + }; +... |