diff options
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos5433.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 114 |
1 files changed, 96 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 62f276970174..2131f12364cb 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -18,8 +18,8 @@ / { compatible = "samsung,exynos5433"; - #address-cells = <2>; - #size-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; @@ -231,18 +231,11 @@ cpu_on = <0xC4000003>; }; - reboot: syscon-reboot { - compatible = "syscon-reboot"; - regmap = <&pmu_system_controller>; - offset = <0x400>; /* SWRESET */ - mask = <0x1>; - }; - soc: soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x0 0x0 0x18000000>; + ranges; arm_a53_pmu { compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; @@ -637,7 +630,7 @@ clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>, <&cmu_peris CLK_SCLK_TMU0>; clock-names = "tmu_apbif", "tmu_sclk"; - #include "exynos5433-tmu-sensor-conf.dtsi" + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -648,7 +641,7 @@ clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>, <&cmu_peris CLK_SCLK_TMU0>; clock-names = "tmu_apbif", "tmu_sclk"; - #include "exynos5433-tmu-sensor-conf.dtsi" + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -659,7 +652,7 @@ clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; - #include "exynos5433-tmu-g3d-sensor-conf.dtsi" + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -670,7 +663,7 @@ clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; - #include "exynos5433-tmu-sensor-conf.dtsi" + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -681,7 +674,7 @@ clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; - #include "exynos5433-tmu-sensor-conf.dtsi" + #thermal-sensor-cells = <0>; status = "disabled"; }; @@ -799,6 +792,13 @@ #clock-cells = <1>; clock-names = "clkout16"; clocks = <&xxti>; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pmu_system_controller>; + offset = <0x400>; /* SWRESET */ + mask = <0x1>; + }; }; gic: interrupt-controller@11001000 { @@ -829,11 +829,16 @@ <&cmu_disp CLK_ACLK_SMMU_DECON0X>, <&cmu_disp CLK_ACLK_XIU_DECON0X>, <&cmu_disp CLK_PCLK_SMMU_DECON0X>, + <&cmu_disp CLK_ACLK_SMMU_DECON1X>, + <&cmu_disp CLK_ACLK_XIU_DECON1X>, + <&cmu_disp CLK_PCLK_SMMU_DECON1X>, <&cmu_disp CLK_SCLK_DECON_VCLK>, <&cmu_disp CLK_SCLK_DECON_ECLK>; clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", - "sclk_decon_vclk", "sclk_decon_eclk"; + "aclk_smmu_decon1x", "aclk_xiu_decon1x", + "pclk_smmu_decon1x", "sclk_decon_vclk", + "sclk_decon_eclk"; power-domains = <&pd_disp>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, @@ -866,11 +871,16 @@ <&cmu_disp CLK_ACLK_SMMU_TV0X>, <&cmu_disp CLK_ACLK_XIU_TV0X>, <&cmu_disp CLK_PCLK_SMMU_TV0X>, + <&cmu_disp CLK_ACLK_SMMU_TV1X>, + <&cmu_disp CLK_ACLK_XIU_TV1X>, + <&cmu_disp CLK_PCLK_SMMU_TV1X>, <&cmu_disp CLK_SCLK_DECON_TV_VCLK>, <&cmu_disp CLK_SCLK_DECON_TV_ECLK>; clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", - "sclk_decon_vclk", "sclk_decon_eclk"; + "aclk_smmu_decon1x", "aclk_xiu_decon1x", + "pclk_smmu_decon1x", "sclk_decon_vclk", + "sclk_decon_eclk"; samsung,disp-sysreg = <&syscon_disp>; power-domains = <&pd_disp>; interrupt-names = "fifo", "vsync", "lcd_sys"; @@ -969,6 +979,7 @@ ddc = <&hsi2c_11>; samsung,syscon-phandle = <&pmu_system_controller>; samsung,sysreg-phandle = <&syscon_disp>; + #sound-dai-cells = <0>; status = "disabled"; }; @@ -1033,6 +1044,30 @@ power-domains = <&pd_gscl>; }; + scaler_0: scaler@15000000 { + compatible = "samsung,exynos5433-scaler"; + reg = <0x15000000 0x1294>; + interrupts = <0 402 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "pclk", "aclk", "aclk_xiu"; + clocks = <&cmu_mscl CLK_PCLK_M2MSCALER0>, + <&cmu_mscl CLK_ACLK_M2MSCALER0>, + <&cmu_mscl CLK_ACLK_XIU_MSCLX>; + iommus = <&sysmmu_scaler_0>; + power-domains = <&pd_mscl>; + }; + + scaler_1: scaler@15010000 { + compatible = "samsung,exynos5433-scaler"; + reg = <0x15010000 0x1294>; + interrupts = <0 403 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "pclk", "aclk", "aclk_xiu"; + clocks = <&cmu_mscl CLK_PCLK_M2MSCALER1>, + <&cmu_mscl CLK_ACLK_M2MSCALER1>, + <&cmu_mscl CLK_ACLK_XIU_MSCLX>; + iommus = <&sysmmu_scaler_1>; + power-domains = <&pd_mscl>; + }; + jpeg: codec@15020000 { compatible = "samsung,exynos5433-jpeg"; reg = <0x15020000 0x10000>; @@ -1136,6 +1171,28 @@ power-domains = <&pd_gscl>; }; + sysmmu_scaler_0: sysmmu@15040000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x15040000 0x1000>; + interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "pclk", "aclk"; + clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>, + <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>; + #iommu-cells = <0>; + power-domains = <&pd_mscl>; + }; + + sysmmu_scaler_1: sysmmu@15050000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x15050000 0x1000>; + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "pclk", "aclk"; + clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>, + <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>; + #iommu-cells = <0>; + power-domains = <&pd_mscl>; + }; + sysmmu_jpeg: sysmmu@15060000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15060000 0x1000>; @@ -1311,6 +1368,25 @@ status = "disabled"; }; + i2s1: i2s@14d60000 { + compatible = "samsung,exynos7-i2s"; + reg = <0x14d60000 0x100>; + dmas = <&pdma0 31 &pdma0 30>; + dma-names = "tx", "rx"; + interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cmu_peric CLK_PCLK_I2S1>, + <&cmu_peric CLK_PCLK_I2S1>, + <&cmu_peric CLK_SCLK_I2S1>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + samsung,supports-6ch; + samsung,supports-rstclr; + samsung,supports-tdm; + samsung,supports-low-rfs; + #sound-dai-cells = <1>; + status = "disabled"; + }; + pwm: pwm@14dd0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x14dd0000 0x100>; @@ -1639,7 +1715,7 @@ power-domains = <&pd_aud>; }; - i2s0: i2s0@11440000 { + i2s0: i2s@11440000 { compatible = "samsung,exynos7-i2s"; reg = <0x11440000 0x100>; dmas = <&adma 0 &adma 2>; @@ -1651,9 +1727,11 @@ <&cmu_aud CLK_SCLK_AUD_I2S>, <&cmu_aud CLK_SCLK_I2S_BCLK>; clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; power-domains = <&pd_aud>; + #sound-dai-cells = <1>; status = "disabled"; }; |