diff options
Diffstat (limited to 'drivers/ata')
-rw-r--r-- | drivers/ata/Kconfig | 11 | ||||
-rw-r--r-- | drivers/ata/Makefile | 1 | ||||
-rw-r--r-- | drivers/ata/ahci.c | 177 | ||||
-rw-r--r-- | drivers/ata/ahci.h | 7 | ||||
-rw-r--r-- | drivers/ata/ahci_brcmstb.c | 1 | ||||
-rw-r--r-- | drivers/ata/ahci_mvebu.c | 14 | ||||
-rw-r--r-- | drivers/ata/ahci_octeon.c | 105 | ||||
-rw-r--r-- | drivers/ata/ahci_platform.c | 1 | ||||
-rw-r--r-- | drivers/ata/ahci_xgene.c | 89 | ||||
-rw-r--r-- | drivers/ata/libahci.c | 145 | ||||
-rw-r--r-- | drivers/ata/libata-core.c | 1 | ||||
-rw-r--r-- | drivers/ata/libata-scsi.c | 15 | ||||
-rw-r--r-- | drivers/ata/libata-sff.c | 35 | ||||
-rw-r--r-- | drivers/ata/pata_at91.c | 3 | ||||
-rw-r--r-- | drivers/ata/pata_bf54x.c | 2 | ||||
-rw-r--r-- | drivers/ata/pata_hpt366.c | 13 | ||||
-rw-r--r-- | drivers/ata/pata_macio.c | 2 | ||||
-rw-r--r-- | drivers/ata/pata_rb532_cf.c | 11 | ||||
-rw-r--r-- | drivers/ata/sata_via.c | 133 |
19 files changed, 616 insertions, 150 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 861643ea91b5..5083f85efea7 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -151,6 +151,15 @@ config AHCI_MVEBU If unsure, say N. +config AHCI_OCTEON + tristate "Cavium Octeon Soc Serial ATA" + depends on SATA_AHCI_PLATFORM && CAVIUM_OCTEON_SOC + default y + help + This option enables support for Cavium Octeon SoC Serial ATA. + + If unsure, say N. + config AHCI_SUNXI tristate "Allwinner sunxi AHCI SATA support" depends on ARCH_SUNXI @@ -355,7 +364,7 @@ config SATA_PROMISE config SATA_RCAR tristate "Renesas R-Car SATA support" - depends on ARCH_SHMOBILE || COMPILE_TEST + depends on ARCH_RENESAS || COMPILE_TEST help This option enables support for Renesas R-Car Serial ATA. diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index af45effac18c..18579521464e 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_AHCI_CEVA) += ahci_ceva.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o +obj-$(CONFIG_AHCI_OCTEON) += ahci_octeon.o obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_ST) += ahci_st.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_TEGRA) += ahci_tegra.o libahci.o libahci_platform.o diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 594fcabd22cd..a83bbcc58b4c 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -85,6 +85,7 @@ enum board_ids { }; static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); +static void ahci_remove_one(struct pci_dev *dev); static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline); static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class, @@ -94,9 +95,13 @@ static bool is_mcp89_apple(struct pci_dev *pdev); static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline); #ifdef CONFIG_PM -static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); -static int ahci_pci_device_resume(struct pci_dev *pdev); +static int ahci_pci_device_runtime_suspend(struct device *dev); +static int ahci_pci_device_runtime_resume(struct device *dev); +#ifdef CONFIG_PM_SLEEP +static int ahci_pci_device_suspend(struct device *dev); +static int ahci_pci_device_resume(struct device *dev); #endif +#endif /* CONFIG_PM */ static struct scsi_host_template ahci_sht = { AHCI_SHT("ahci"), @@ -264,6 +269,26 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ + { PCI_VDEVICE(INTEL, 0x19b0), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b1), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b2), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b3), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b4), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b5), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b6), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19b7), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19bE), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19bF), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c0), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c1), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c2), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c3), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c4), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c5), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c6), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19c7), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19cE), board_ahci }, /* DNV AHCI */ + { PCI_VDEVICE(INTEL, 0x19cF), board_ahci }, /* DNV AHCI */ { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */ { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ @@ -347,15 +372,17 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H RAID */ { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */ { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/ { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/ - { PCI_VDEVICE(INTEL, 0xa184), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa186), board_ahci }, /* Lewisburg RAID*/ - { PCI_VDEVICE(INTEL, 0xa18e), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0xa1d2), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0xa1d6), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa202), board_ahci }, /* Lewisburg AHCI*/ - { PCI_VDEVICE(INTEL, 0xa204), board_ahci }, /* Lewisburg RAID*/ { PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/ - { PCI_VDEVICE(INTEL, 0xa20e), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/ + { PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/ /* JMicron 360/1/3/5/6, match class to avoid IDE function */ { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, @@ -537,16 +564,20 @@ static const struct pci_device_id ahci_pci_tbl[] = { { } /* terminate list */ }; +static const struct dev_pm_ops ahci_pci_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(ahci_pci_device_suspend, ahci_pci_device_resume) + SET_RUNTIME_PM_OPS(ahci_pci_device_runtime_suspend, + ahci_pci_device_runtime_resume, NULL) +}; static struct pci_driver ahci_pci_driver = { .name = DRV_NAME, .id_table = ahci_pci_tbl, .probe = ahci_init_one, - .remove = ata_pci_remove_one, -#ifdef CONFIG_PM - .suspend = ahci_pci_device_suspend, - .resume = ahci_pci_device_resume, -#endif + .remove = ahci_remove_one, + .driver = { + .pm = &ahci_pci_pm_ops, + }, }; #if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE) @@ -775,42 +806,66 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class, #ifdef CONFIG_PM -static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) +static void ahci_pci_disable_interrupts(struct ata_host *host) { - struct ata_host *host = pci_get_drvdata(pdev); struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = hpriv->mmio; u32 ctl; - if (mesg.event & PM_EVENT_SUSPEND && - hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { - dev_err(&pdev->dev, - "BIOS update required for suspend/resume\n"); - return -EIO; - } + /* AHCI spec rev1.1 section 8.3.3: + * Software must disable interrupts prior to requesting a + * transition of the HBA to D3 state. + */ + ctl = readl(mmio + HOST_CTL); + ctl &= ~HOST_IRQ_EN; + writel(ctl, mmio + HOST_CTL); + readl(mmio + HOST_CTL); /* flush */ +} - if (mesg.event & PM_EVENT_SLEEP) { - /* AHCI spec rev1.1 section 8.3.3: - * Software must disable interrupts prior to requesting a - * transition of the HBA to D3 state. - */ - ctl = readl(mmio + HOST_CTL); - ctl &= ~HOST_IRQ_EN; - writel(ctl, mmio + HOST_CTL); - readl(mmio + HOST_CTL); /* flush */ - } +static int ahci_pci_device_runtime_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct ata_host *host = pci_get_drvdata(pdev); - return ata_pci_device_suspend(pdev, mesg); + ahci_pci_disable_interrupts(host); + return 0; } -static int ahci_pci_device_resume(struct pci_dev *pdev) +static int ahci_pci_device_runtime_resume(struct device *dev) { + struct pci_dev *pdev = to_pci_dev(dev); struct ata_host *host = pci_get_drvdata(pdev); int rc; - rc = ata_pci_device_do_resume(pdev); + rc = ahci_pci_reset_controller(host); if (rc) return rc; + ahci_pci_init_controller(host); + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int ahci_pci_device_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct ata_host *host = pci_get_drvdata(pdev); + struct ahci_host_priv *hpriv = host->private_data; + + if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { + dev_err(&pdev->dev, + "BIOS update required for suspend/resume\n"); + return -EIO; + } + + ahci_pci_disable_interrupts(host); + return ata_host_suspend(host, PMSG_SUSPEND); +} + +static int ahci_pci_device_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct ata_host *host = pci_get_drvdata(pdev); + int rc; /* Apple BIOS helpfully mangles the registers on resume */ if (is_mcp89_apple(pdev)) @@ -830,6 +885,8 @@ static int ahci_pci_device_resume(struct pci_dev *pdev) } #endif +#endif /* CONFIG_PM */ + static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac) { int rc; @@ -1305,6 +1362,44 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host) {} #endif +#ifdef CONFIG_ARM64 +/* + * Due to ERRATA#22536, ThunderX needs to handle HOST_IRQ_STAT differently. + * Workaround is to make sure all pending IRQs are served before leaving + * handler. + */ +static irqreturn_t ahci_thunderx_irq_handler(int irq, void *dev_instance) +{ + struct ata_host *host = dev_instance; + struct ahci_host_priv *hpriv; + unsigned int rc = 0; + void __iomem *mmio; + u32 irq_stat, irq_masked; + unsigned int handled = 1; + + VPRINTK("ENTER\n"); + hpriv = host->private_data; + mmio = hpriv->mmio; + irq_stat = readl(mmio + HOST_IRQ_STAT); + if (!irq_stat) + return IRQ_NONE; + + do { + irq_masked = irq_stat & hpriv->port_map; + spin_lock(&host->lock); + rc = ahci_handle_port_intr(host, irq_masked); + if (!rc) + handled = 0; + writel(irq_stat, mmio + HOST_IRQ_STAT); + irq_stat = readl(mmio + HOST_IRQ_STAT); + spin_unlock(&host->lock); + } while (irq_stat); + VPRINTK("EXIT\n"); + + return IRQ_RETVAL(handled); +} +#endif + /* * ahci_init_msix() - optionally enable per-port MSI-X otherwise defer * to single msi. @@ -1540,6 +1635,11 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (ahci_broken_devslp(pdev)) hpriv->flags |= AHCI_HFLAG_NO_DEVSLP; +#ifdef CONFIG_ARM64 + if (pdev->vendor == 0x177d && pdev->device == 0xa01c) + hpriv->irq_handler = ahci_thunderx_irq_handler; +#endif + /* save initial config */ ahci_pci_save_initial_config(pdev, hpriv); @@ -1649,7 +1749,18 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) pci_set_master(pdev); - return ahci_host_activate(host, &ahci_sht); + rc = ahci_host_activate(host, &ahci_sht); + if (rc) + return rc; + + pm_runtime_put_noidle(&pdev->dev); + return 0; +} + +static void ahci_remove_one(struct pci_dev *pdev) +{ + pm_runtime_get_noresume(&pdev->dev); + ata_pci_remove_one(pdev); } module_pci_driver(ahci_pci_driver); diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index a4faa438889c..70b06bcfb7e3 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -240,8 +240,7 @@ enum { error-handling stage) */ AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */ AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */ - AHCI_HFLAG_EDGE_IRQ = (1 << 19), /* HOST_IRQ_STAT behaves as - Edge Triggered */ + #ifdef CONFIG_PCI_MSI AHCI_HFLAG_MULTI_MSI = (1 << 20), /* multiple PCI MSIs */ AHCI_HFLAG_MULTI_MSIX = (1 << 21), /* per-port MSI-X */ @@ -250,6 +249,7 @@ enum { AHCI_HFLAG_MULTI_MSI = 0, AHCI_HFLAG_MULTI_MSIX = 0, #endif + AHCI_HFLAG_WAKE_BEFORE_STOP = (1 << 22), /* wake before DMA stop */ /* ap->flags bits */ @@ -335,6 +335,7 @@ struct ahci_host_priv { void __iomem * mmio; /* bus-independent mem map */ u32 cap; /* cap to use */ u32 cap2; /* cap2 to use */ + u32 version; /* cached version */ u32 port_map; /* port map to use */ u32 saved_cap; /* saved initial cap */ u32 saved_cap2; /* saved initial cap2 */ @@ -360,6 +361,7 @@ struct ahci_host_priv { * be overridden anytime before the host is activated. */ void (*start_engine)(struct ata_port *ap); + irqreturn_t (*irq_handler)(int irq, void *dev_instance); }; #ifdef CONFIG_PCI_MSI @@ -423,6 +425,7 @@ int ahci_reset_em(struct ata_host *host); void ahci_print_info(struct ata_host *host, const char *scc_s); int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht); void ahci_error_handler(struct ata_port *ap); +u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked); static inline void __iomem *__ahci_port_base(struct ata_host *host, unsigned int port_no) diff --git a/drivers/ata/ahci_brcmstb.c b/drivers/ata/ahci_brcmstb.c index b36cae2fd04b..e87bcec0fd7c 100644 --- a/drivers/ata/ahci_brcmstb.c +++ b/drivers/ata/ahci_brcmstb.c @@ -317,6 +317,7 @@ static int brcm_ahci_probe(struct platform_device *pdev) if (IS_ERR(hpriv)) return PTR_ERR(hpriv); hpriv->plat_data = priv; + hpriv->flags = AHCI_HFLAG_WAKE_BEFORE_STOP; brcm_sata_alpm_init(hpriv); diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c index f7a7fa81740e..de7128d81e9c 100644 --- a/drivers/ata/ahci_mvebu.c +++ b/drivers/ata/ahci_mvebu.c @@ -112,12 +112,15 @@ static int ahci_mvebu_probe(struct platform_device *pdev) if (rc) return rc; - dram = mv_mbus_dram_info(); - if (!dram) - return -ENODEV; + if (of_device_is_compatible(pdev->dev.of_node, + "marvell,armada-380-ahci")) { + dram = mv_mbus_dram_info(); + if (!dram) + return -ENODEV; - ahci_mvebu_mbus_config(hpriv, dram); - ahci_mvebu_regret_option(hpriv); + ahci_mvebu_mbus_config(hpriv, dram); + ahci_mvebu_regret_option(hpriv); + } rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info, &ahci_platform_sht); @@ -133,6 +136,7 @@ disable_resources: static const struct of_device_id ahci_mvebu_of_match[] = { { .compatible = "marvell,armada-380-ahci", }, + { .compatible = "marvell,armada-3700-ahci", }, { }, }; MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match); diff --git a/drivers/ata/ahci_octeon.c b/drivers/ata/ahci_octeon.c new file mode 100644 index 000000000000..ea865fe953e1 --- /dev/null +++ b/drivers/ata/ahci_octeon.c @@ -0,0 +1,105 @@ +/* + * SATA glue for Cavium Octeon III SOCs. + * + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2010-2015 Cavium Networks + * + */ + +#include <linux/module.h> +#include <linux/dma-mapping.h> +#include <linux/platform_device.h> +#include <linux/of_platform.h> + +#include <asm/octeon/octeon.h> +#include <asm/bitfield.h> + +#define CVMX_SATA_UCTL_SHIM_CFG 0xE8 + +#define SATA_UCTL_ENDIAN_MODE_BIG 1 +#define SATA_UCTL_ENDIAN_MODE_LITTLE 0 +#define SATA_UCTL_ENDIAN_MODE_MASK 3 + +#define SATA_UCTL_DMA_ENDIAN_MODE_SHIFT 8 +#define SATA_UCTL_CSR_ENDIAN_MODE_SHIFT 0 +#define SATA_UCTL_DMA_READ_CMD_SHIFT 12 + +static int ahci_octeon_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct resource *res; + void __iomem *base; + u64 cfg; + int ret; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "Platform resource[0] is missing\n"); + return -ENODEV; + } + + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + cfg = cvmx_readq_csr(base + CVMX_SATA_UCTL_SHIM_CFG); + + cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT); + cfg &= ~(SATA_UCTL_ENDIAN_MODE_MASK << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT); + +#ifdef __BIG_ENDIAN + cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT; + cfg |= SATA_UCTL_ENDIAN_MODE_BIG << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT; +#else + cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_DMA_ENDIAN_MODE_SHIFT; + cfg |= SATA_UCTL_ENDIAN_MODE_LITTLE << SATA_UCTL_CSR_ENDIAN_MODE_SHIFT; +#endif + + cfg |= 1 << SATA_UCTL_DMA_READ_CMD_SHIFT; + + cvmx_writeq_csr(base + CVMX_SATA_UCTL_SHIM_CFG, cfg); + + if (!node) { + dev_err(dev, "no device node, failed to add octeon sata\n"); + return -ENODEV; + } + + ret = of_platform_populate(node, NULL, NULL, dev); + if (ret) { + dev_err(dev, "failed to add ahci-platform core\n"); + return ret; + } + + return 0; +} + +static int ahci_octeon_remove(struct platform_device *pdev) +{ + return 0; +} + +static const struct of_device_id octeon_ahci_match[] = { + { .compatible = "cavium,octeon-7130-sata-uctl", }, + {}, +}; +MODULE_DEVICE_TABLE(of, octeon_ahci_match); + +static struct platform_driver ahci_octeon_driver = { + .probe = ahci_octeon_probe, + .remove = ahci_octeon_remove, + .driver = { + .name = "octeon-ahci", + .of_match_table = octeon_ahci_match, + }, +}; + +module_platform_driver(ahci_octeon_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Cavium, Inc. <support@cavium.com>"); +MODULE_DESCRIPTION("Cavium Inc. sata config."); diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c index 04975b851c23..40442332bfa7 100644 --- a/drivers/ata/ahci_platform.c +++ b/drivers/ata/ahci_platform.c @@ -76,6 +76,7 @@ static const struct of_device_id ahci_of_match[] = { { .compatible = "ibm,476gtr-ahci", }, { .compatible = "snps,dwc-ahci", }, { .compatible = "hisilicon,hisi-ahci", }, + { .compatible = "cavium,octeon-7130-ahci", }, {}, }; MODULE_DEVICE_TABLE(of, ahci_of_match); diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c index e2c6d9e0c5ac..73b19b277138 100644 --- a/drivers/ata/ahci_xgene.c +++ b/drivers/ata/ahci_xgene.c @@ -548,6 +548,88 @@ softreset_retry: return rc; } +/** + * xgene_ahci_handle_broken_edge_irq - Handle the broken irq. + * @ata_host: Host that recieved the irq + * @irq_masked: HOST_IRQ_STAT value + * + * For hardware with broken edge trigger latch + * the HOST_IRQ_STAT register misses the edge interrupt + * when clearing of HOST_IRQ_STAT register and hardware + * reporting the PORT_IRQ_STAT register at the + * same clock cycle. + * As such, the algorithm below outlines the workaround. + * + * 1. Read HOST_IRQ_STAT register and save the state. + * 2. Clear the HOST_IRQ_STAT register. + * 3. Read back the HOST_IRQ_STAT register. + * 4. If HOST_IRQ_STAT register equals to zero, then + * traverse the rest of port's PORT_IRQ_STAT register + * to check if an interrupt is triggered at that point else + * go to step 6. + * 5. If PORT_IRQ_STAT register of rest ports is not equal to zero + * then update the state of HOST_IRQ_STAT saved in step 1. + * 6. Handle port interrupts. + * 7. Exit + */ +static int xgene_ahci_handle_broken_edge_irq(struct ata_host *host, + u32 irq_masked) +{ + struct ahci_host_priv *hpriv = host->private_data; + void __iomem *port_mmio; + int i; + + if (!readl(hpriv->mmio + HOST_IRQ_STAT)) { + for (i = 0; i < host->n_ports; i++) { + if (irq_masked & (1 << i)) + continue; + + port_mmio = ahci_port_base(host->ports[i]); + if (readl(port_mmio + PORT_IRQ_STAT)) + irq_masked |= (1 << i); + } + } + + return ahci_handle_port_intr(host, irq_masked); +} + +static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance) +{ + struct ata_host *host = dev_instance; + struct ahci_host_priv *hpriv; + unsigned int rc = 0; + void __iomem *mmio; + u32 irq_stat, irq_masked; + + VPRINTK("ENTER\n"); + + hpriv = host->private_data; + mmio = hpriv->mmio; + + /* sigh. 0xffffffff is a valid return from h/w */ + irq_stat = readl(mmio + HOST_IRQ_STAT); + if (!irq_stat) + return IRQ_NONE; + + irq_masked = irq_stat & hpriv->port_map; + + spin_lock(&host->lock); + + /* + * HOST_IRQ_STAT behaves as edge triggered latch meaning that + * it should be cleared before all the port events are cleared. + */ + writel(irq_stat, mmio + HOST_IRQ_STAT); + + rc = xgene_ahci_handle_broken_edge_irq(host, irq_masked); + + spin_unlock(&host->lock); + + VPRINTK("EXIT\n"); + + return IRQ_RETVAL(rc); +} + static struct ata_port_operations xgene_ahci_v1_ops = { .inherits = &ahci_ops, .host_stop = xgene_ahci_host_stop, @@ -739,9 +821,9 @@ static int xgene_ahci_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "%s: Error reading device info. Assume version1\n", __func__); version = XGENE_AHCI_V1; - } - if (info->valid & ACPI_VALID_CID) + } else if (info->valid & ACPI_VALID_CID) { version = XGENE_AHCI_V2; + } } } #endif @@ -779,7 +861,8 @@ skip_clk_phy: hpriv->flags = AHCI_HFLAG_NO_NCQ; break; case XGENE_AHCI_V2: - hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ; + hpriv->flags |= AHCI_HFLAG_YES_FBS; + hpriv->irq_handler = xgene_ahci_irq_intr; break; default: break; diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c index d61740e78d6d..3982054060b8 100644 --- a/drivers/ata/libahci.c +++ b/drivers/ata/libahci.c @@ -113,6 +113,7 @@ static ssize_t ahci_store_em_buffer(struct device *dev, const char *buf, size_t size); static ssize_t ahci_show_em_supported(struct device *dev, struct device_attribute *attr, char *buf); +static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance); static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL); static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL); @@ -224,6 +225,31 @@ static void ahci_enable_ahci(void __iomem *mmio) WARN_ON(1); } +/** + * ahci_rpm_get_port - Make sure the port is powered on + * @ap: Port to power on + * + * Whenever there is need to access the AHCI host registers outside of + * normal execution paths, call this function to make sure the host is + * actually powered on. + */ +static int ahci_rpm_get_port(struct ata_port *ap) +{ + return pm_runtime_get_sync(ap->dev); +} + +/** + * ahci_rpm_put_port - Undoes ahci_rpm_get_port() + * @ap: Port to power down + * + * Undoes ahci_rpm_get_port() and possibly powers down the AHCI host + * if it has no more active users. + */ +static void ahci_rpm_put_port(struct ata_port *ap) +{ + pm_runtime_put(ap->dev); +} + static ssize_t ahci_show_host_caps(struct device *dev, struct device_attribute *attr, char *buf) { @@ -250,9 +276,8 @@ static ssize_t ahci_show_host_version(struct device *dev, struct Scsi_Host *shost = class_to_shost(dev); struct ata_port *ap = ata_shost_to_port(shost); struct ahci_host_priv *hpriv = ap->host->private_data; - void __iomem *mmio = hpriv->mmio; - return sprintf(buf, "%x\n", readl(mmio + HOST_VERSION)); + return sprintf(buf, "%x\n", hpriv->version); } static ssize_t ahci_show_port_cmd(struct device *dev, @@ -261,8 +286,13 @@ static ssize_t ahci_show_port_cmd(struct device *dev, struct Scsi_Host *shost = class_to_shost(dev); struct ata_port *ap = ata_shost_to_port(shost); void __iomem *port_mmio = ahci_port_base(ap); + ssize_t ret; - return sprintf(buf, "%x\n", readl(port_mmio + PORT_CMD)); + ahci_rpm_get_port(ap); + ret = sprintf(buf, "%x\n", readl(port_mmio + PORT_CMD)); + ahci_rpm_put_port(ap); + + return ret; } static ssize_t ahci_read_em_buffer(struct device *dev, @@ -278,17 +308,20 @@ static ssize_t ahci_read_em_buffer(struct device *dev, size_t count; int i; + ahci_rpm_get_port(ap); spin_lock_irqsave(ap->lock, flags); em_ctl = readl(mmio + HOST_EM_CTL); if (!(ap->flags & ATA_FLAG_EM) || em_ctl & EM_CTL_XMT || !(hpriv->em_msg_type & EM_MSG_TYPE_SGPIO)) { spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return -EINVAL; } if (!(em_ctl & EM_CTL_MR)) { spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return -EAGAIN; } @@ -316,6 +349,7 @@ static ssize_t ahci_read_em_buffer(struct device *dev, } spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return i; } @@ -340,11 +374,13 @@ static ssize_t ahci_store_em_buffer(struct device *dev, size % 4 || size > hpriv->em_buf_sz) return -EINVAL; + ahci_rpm_get_port(ap); spin_lock_irqsave(ap->lock, flags); em_ctl = readl(mmio + HOST_EM_CTL); if (em_ctl & EM_CTL_TM) { spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return -EBUSY; } @@ -357,6 +393,7 @@ static ssize_t ahci_store_em_buffer(struct device *dev, writel(em_ctl | EM_CTL_TM, mmio + HOST_EM_CTL); spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return size; } @@ -370,7 +407,9 @@ static ssize_t ahci_show_em_supported(struct device *dev, void __iomem *mmio = hpriv->mmio; u32 em_ctl; + ahci_rpm_get_port(ap); em_ctl = readl(mmio + HOST_EM_CTL); + ahci_rpm_put_port(ap); return sprintf(buf, "%s%s%s%s\n", em_ctl & EM_CTL_LED ? "led " : "", @@ -496,8 +535,8 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) } } - /* fabricate port_map from cap.nr_ports */ - if (!port_map) { + /* fabricate port_map from cap.nr_ports for < AHCI 1.3 */ + if (!port_map && vers < 0x10300) { port_map = (1 << ahci_nr_ports(cap)) - 1; dev_warn(dev, "forcing PORTS_IMPL to 0x%x\n", port_map); @@ -508,10 +547,14 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) /* record values to use during operation */ hpriv->cap = cap; hpriv->cap2 = cap2; + hpriv->version = readl(mmio + HOST_VERSION); hpriv->port_map = port_map; if (!hpriv->start_engine) hpriv->start_engine = ahci_start_engine; + + if (!hpriv->irq_handler) + hpriv->irq_handler = ahci_single_level_irq_intr; } EXPORT_SYMBOL_GPL(ahci_save_initial_config); @@ -593,8 +636,22 @@ EXPORT_SYMBOL_GPL(ahci_start_engine); int ahci_stop_engine(struct ata_port *ap) { void __iomem *port_mmio = ahci_port_base(ap); + struct ahci_host_priv *hpriv = ap->host->private_data; u32 tmp; + /* + * On some controllers, stopping a port's DMA engine while the port + * is in ALPM state (partial or slumber) results in failures on + * subsequent DMA engine starts. For those controllers, put the + * port back in active state before stopping its DMA engine. + */ + if ((hpriv->flags & AHCI_HFLAG_WAKE_BEFORE_STOP) && + (ap->link.lpm_policy > ATA_LPM_MAX_POWER) && + ahci_set_lpm(&ap->link, ATA_LPM_MAX_POWER, ATA_LPM_WAKE_ONLY)) { + dev_err(ap->host->dev, "Failed to wake up port before engine stop\n"); + return -EIO; + } + tmp = readl(port_mmio + PORT_CMD); /* check if the HBA is idle */ @@ -689,6 +746,9 @@ static int ahci_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, void __iomem *port_mmio = ahci_port_base(ap); if (policy != ATA_LPM_MAX_POWER) { + /* wakeup flag only applies to the max power policy */ + hints &= ~ATA_LPM_WAKE_ONLY; + /* * Disable interrupts on Phy Ready. This keeps us from * getting woken up due to spurious phy ready @@ -704,7 +764,8 @@ static int ahci_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, u32 cmd = readl(port_mmio + PORT_CMD); if (policy == ATA_LPM_MAX_POWER || !(hints & ATA_LPM_HIPM)) { - cmd &= ~(PORT_CMD_ASP | PORT_CMD_ALPE); + if (!(hints & ATA_LPM_WAKE_ONLY)) + cmd &= ~(PORT_CMD_ASP | PORT_CMD_ALPE); cmd |= PORT_CMD_ICC_ACTIVE; writel(cmd, port_mmio + PORT_CMD); @@ -712,6 +773,9 @@ static int ahci_set_lpm(struct ata_link *link, enum ata_lpm_policy policy, /* wait 10ms to be sure we've come out of LPM state */ ata_msleep(ap, 10); + + if (hints & ATA_LPM_WAKE_ONLY) + return 0; } else { cmd |= PORT_CMD_ALPE; if (policy == ATA_LPM_MIN_POWER) @@ -989,6 +1053,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state, else return -EINVAL; + ahci_rpm_get_port(ap); spin_lock_irqsave(ap->lock, flags); /* @@ -998,6 +1063,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state, em_ctl = readl(mmio + HOST_EM_CTL); if (em_ctl & EM_CTL_TM) { spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); return -EBUSY; } @@ -1025,6 +1091,8 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, u32 state, emp->led_state = state; spin_unlock_irqrestore(ap->lock, flags); + ahci_rpm_put_port(ap); + return size; } @@ -1143,8 +1211,7 @@ static void ahci_port_init(struct device *dev, struct ata_port *ap, /* mark esata ports */ tmp = readl(port_mmio + PORT_CMD); - if ((tmp & PORT_CMD_HPCP) || - ((tmp & PORT_CMD_ESP) && (hpriv->cap & HOST_CAP_SXS))) + if ((tmp & PORT_CMD_ESP) && (hpriv->cap & HOST_CAP_SXS)) ap->pflags |= ATA_PFLAG_EXTERNAL; } @@ -1825,7 +1892,7 @@ static irqreturn_t ahci_multi_irqs_intr_hard(int irq, void *dev_instance) return IRQ_HANDLED; } -static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked) +u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked) { unsigned int i, handled = 0; @@ -1851,43 +1918,7 @@ static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked) return handled; } - -static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance) -{ - struct ata_host *host = dev_instance; - struct ahci_host_priv *hpriv; - unsigned int rc = 0; - void __iomem *mmio; - u32 irq_stat, irq_masked; - - VPRINTK("ENTER\n"); - - hpriv = host->private_data; - mmio = hpriv->mmio; - - /* sigh. 0xffffffff is a valid return from h/w */ - irq_stat = readl(mmio + HOST_IRQ_STAT); - if (!irq_stat) - return IRQ_NONE; - - irq_masked = irq_stat & hpriv->port_map; - - spin_lock(&host->lock); - - /* - * HOST_IRQ_STAT behaves as edge triggered latch meaning that - * it should be cleared before all the port events are cleared. - */ - writel(irq_stat, mmio + HOST_IRQ_STAT); - - rc = ahci_handle_port_intr(host, irq_masked); - - spin_unlock(&host->lock); - - VPRINTK("EXIT\n"); - - return IRQ_RETVAL(rc); -} +EXPORT_SYMBOL_GPL(ahci_handle_port_intr); static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance) { @@ -2227,6 +2258,8 @@ static void ahci_pmp_detach(struct ata_port *ap) int ahci_port_resume(struct ata_port *ap) { + ahci_rpm_get_port(ap); + ahci_power_up(ap); ahci_start_port(ap); @@ -2253,6 +2286,7 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) ata_port_freeze(ap); } + ahci_rpm_put_port(ap); return rc; } #endif @@ -2368,11 +2402,10 @@ static void ahci_port_stop(struct ata_port *ap) void ahci_print_info(struct ata_host *host, const char *scc_s) { struct ahci_host_priv *hpriv = host->private_data; - void __iomem *mmio = hpriv->mmio; u32 vers, cap, cap2, impl, speed; const char *speed_s; - vers = readl(mmio + HOST_VERSION); + vers = hpriv->version; cap = hpriv->cap; cap2 = hpriv->cap2; impl = hpriv->port_map; @@ -2514,14 +2547,18 @@ int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht) int irq = hpriv->irq; int rc; - if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX)) + if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX)) { + if (hpriv->irq_handler) + dev_warn(host->dev, "both AHCI_HFLAG_MULTI_MSI flag set \ + and custom irq handler implemented\n"); + rc = ahci_host_activate_multi_irqs(host, sht); - else if (hpriv->flags & AHCI_HFLAG_EDGE_IRQ) - rc = ata_host_activate(host, irq, ahci_single_edge_irq_intr, - IRQF_SHARED, sht); - else - rc = ata_host_activate(host, irq, ahci_single_level_irq_intr, + } else { + rc = ata_host_activate(host, irq, hpriv->irq_handler, IRQF_SHARED, sht); + } + + return rc; } EXPORT_SYMBOL_GPL(ahci_host_activate); diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index cbb74719d2c1..55e257c268dd 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -4125,6 +4125,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, { " 2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA }, + { "VRFDFC22048UCHC-TE*", NULL, ATA_HORKAGE_NODMA }, /* Odd clown on sil3726/4726 PMPs */ { "Config Disk", NULL, ATA_HORKAGE_DISABLE }, diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 7e959f90c020..567859ce0512 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -174,13 +174,13 @@ static ssize_t ata_scsi_park_show(struct device *device, struct ata_port *ap; struct ata_link *link; struct ata_device *dev; - unsigned long flags, now; + unsigned long now; unsigned int uninitialized_var(msecs); int rc = 0; ap = ata_shost_to_port(sdev->host); - spin_lock_irqsave(ap->lock, flags); + spin_lock_irq(ap->lock); dev = ata_scsi_find_dev(ap, sdev); if (!dev) { rc = -ENODEV; @@ -675,19 +675,18 @@ static int ata_ioc32(struct ata_port *ap) int ata_sas_scsi_ioctl(struct ata_port *ap, struct scsi_device *scsidev, int cmd, void __user *arg) { - int val = -EINVAL, rc = -EINVAL; + unsigned long val; + int rc = -EINVAL; unsigned long flags; switch (cmd) { - case ATA_IOC_GET_IO32: + case HDIO_GET_32BIT: spin_lock_irqsave(ap->lock, flags); val = ata_ioc32(ap); spin_unlock_irqrestore(ap->lock, flags); - if (copy_to_user(arg, &val, 1)) - return -EFAULT; - return 0; + return put_user(val, (unsigned long __user *)arg); - case ATA_IOC_SET_IO32: + case HDIO_SET_32BIT: val = (unsigned long) arg; rc = 0; spin_lock_irqsave(ap->lock, flags); diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index cdf6215a9a22..051b6158d1b7 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c @@ -997,12 +997,9 @@ static inline int ata_hsm_ok_in_wq(struct ata_port *ap, static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) { struct ata_port *ap = qc->ap; - unsigned long flags; if (ap->ops->error_handler) { if (in_wq) { - spin_lock_irqsave(ap->lock, flags); - /* EH might have kicked in while host lock is * released. */ @@ -1014,8 +1011,6 @@ static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) } else ata_port_freeze(ap); } - - spin_unlock_irqrestore(ap->lock, flags); } else { if (likely(!(qc->err_mask & AC_ERR_HSM))) ata_qc_complete(qc); @@ -1024,10 +1019,8 @@ static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) } } else { if (in_wq) { - spin_lock_irqsave(ap->lock, flags); ata_sff_irq_on(ap); ata_qc_complete(qc); - spin_unlock_irqrestore(ap->lock, flags); } else ata_qc_complete(qc); } @@ -1048,9 +1041,10 @@ int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, { struct ata_link *link = qc->dev->link; struct ata_eh_info *ehi = &link->eh_info; - unsigned long flags = 0; int poll_next; + lockdep_assert_held(ap->lock); + WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0); /* Make sure ata_sff_qc_issue() does not throw things @@ -1112,14 +1106,6 @@ fsm_start: } } - /* Send the CDB (atapi) or the first data block (ata pio out). - * During the state transition, interrupt handler shouldn't - * be invoked before the data transfer is complete and - * hsm_task_state is changed. Hence, the following locking. - */ - if (in_wq) - spin_lock_irqsave(ap->lock, flags); - if (qc->tf.protocol == ATA_PROT_PIO) { /* PIO data out protocol. * send first data block. @@ -1135,9 +1121,6 @@ fsm_start: /* send CDB */ atapi_send_cdb(ap, qc); - if (in_wq) - spin_unlock_irqrestore(ap->lock, flags); - /* if polling, ata_sff_pio_task() handles the rest. * otherwise, interrupt handler takes over from here. */ @@ -1296,7 +1279,8 @@ fsm_start: break; default: poll_next = 0; - BUG(); + WARN(true, "ata%d: SFF host state machine in invalid state %d", + ap->print_id, ap->hsm_task_state); } return poll_next; @@ -1361,12 +1345,14 @@ static void ata_sff_pio_task(struct work_struct *work) u8 status; int poll_next; + spin_lock_irq(ap->lock); + BUG_ON(ap->sff_pio_task_link == NULL); /* qc can be NULL if timeout occurred */ qc = ata_qc_from_tag(ap, link->active_tag); if (!qc) { ap->sff_pio_task_link = NULL; - return; + goto out_unlock; } fsm_start: @@ -1381,11 +1367,14 @@ fsm_start: */ status = ata_sff_busy_wait(ap, ATA_BUSY, 5); if (status & ATA_BUSY) { + spin_unlock_irq(ap->lock); ata_msleep(ap, 2); + spin_lock_irq(ap->lock); + status = ata_sff_busy_wait(ap, ATA_BUSY, 10); if (status & ATA_BUSY) { ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE); - return; + goto out_unlock; } } @@ -1402,6 +1391,8 @@ fsm_start: */ if (poll_next) goto fsm_start; +out_unlock: + spin_unlock_irq(ap->lock); } /** diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index ace0a4de3449..9f27b14009f9 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c @@ -30,8 +30,7 @@ #include <linux/ata_platform.h> #include <linux/platform_data/atmel.h> #include <linux/regmap.h> - -#include <asm/gpio.h> +#include <linux/gpio.h> #define DRV_NAME "pata_at91" #define DRV_VERSION "0.3" diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c index dd7410019d15..ec748d31928d 100644 --- a/drivers/ata/pata_bf54x.c +++ b/drivers/ata/pata_bf54x.c @@ -36,8 +36,8 @@ #include <scsi/scsi_host.h> #include <linux/libata.h> #include <linux/platform_device.h> +#include <linux/gpio.h> #include <asm/dma.h> -#include <asm/gpio.h> #include <asm/portmux.h> #define DRV_NAME "pata-bf54x" diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index 0038dc4c06c7..e5fb7525a5df 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c @@ -176,17 +176,14 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, const char * const list[]) { unsigned char model_num[ATA_ID_PROD_LEN + 1]; - int i = 0; + int i; ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); - while (list[i] != NULL) { - if (!strcmp(list[i], model_num)) { - pr_warn("%s is not supported for %s\n", - modestr, list[i]); - return 1; - } - i++; + i = match_string(list, -1, model_num); + if (i >= 0) { + pr_warn("%s is not supported for %s\n", modestr, list[i]); + return 1; } return 0; } diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c index e3d4b059fcd1..e347e7acd8ed 100644 --- a/drivers/ata/pata_macio.c +++ b/drivers/ata/pata_macio.c @@ -22,6 +22,7 @@ #include <linux/scatterlist.h> #include <linux/of.h> #include <linux/gfp.h> +#include <linux/pci.h> #include <scsi/scsi.h> #include <scsi/scsi_host.h> @@ -30,7 +31,6 @@ #include <asm/macio.h> #include <asm/io.h> #include <asm/dbdma.h> -#include <asm/pci-bridge.h> #include <asm/machdep.h> #include <asm/pmac_feature.h> #include <asm/mediabay.h> diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c index 12fe0f3bb7e9..c8b6a780a290 100644 --- a/drivers/ata/pata_rb532_cf.c +++ b/drivers/ata/pata_rb532_cf.c @@ -32,6 +32,8 @@ #include <linux/libata.h> #include <scsi/scsi_host.h> +#include <asm/mach-rc32434/rb.h> + #define DRV_NAME "pata-rb532-cf" #define DRV_VERSION "0.1.0" #define DRV_DESC "PATA driver for RouterBOARD 532 Compact Flash" @@ -107,6 +109,7 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) int gpio; struct resource *res; struct ata_host *ah; + struct cf_device *pdata; struct rb532_cf_info *info; int ret; @@ -122,7 +125,13 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) return -ENOENT; } - gpio = irq_to_gpio(irq); + pdata = dev_get_platdata(&pdev->dev); + if (!pdata) { + dev_err(&pdev->dev, "no platform data specified\n"); + return -EINVAL; + } + + gpio = pdata->gpio_pin; if (gpio < 0) { dev_err(&pdev->dev, "no GPIO found for irq%d\n", irq); return -ENOENT; diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 17d31fc009ab..0636d84fbefe 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c @@ -61,6 +61,7 @@ enum { SATA_CHAN_ENAB = 0x40, /* SATA channel enable */ SATA_INT_GATE = 0x41, /* SATA interrupt gating */ SATA_NATIVE_MODE = 0x42, /* Native mode enable */ + SVIA_MISC_3 = 0x46, /* Miscellaneous Control III */ PATA_UDMA_TIMING = 0xB3, /* PATA timing for DMA/ cable detect */ PATA_PIO_TIMING = 0xAB, /* PATA timing register */ @@ -71,9 +72,18 @@ enum { NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4), SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ + + SATA_HOTPLUG = (1 << 5), /* enable IRQ on hotplug */ +}; + +struct svia_priv { + bool wd_workaround; }; static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); +#ifdef CONFIG_PM_SLEEP +static int svia_pci_device_resume(struct pci_dev *pdev); +#endif static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val); @@ -85,6 +95,7 @@ static void vt6420_bmdma_start(struct ata_queued_cmd *qc); static int vt6421_pata_cable_detect(struct ata_port *ap); static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); +static void vt6421_error_handler(struct ata_port *ap); static const struct pci_device_id svia_pci_tbl[] = { { PCI_VDEVICE(VIA, 0x5337), vt6420 }, @@ -105,7 +116,7 @@ static struct pci_driver svia_pci_driver = { .probe = svia_init_one, #ifdef CONFIG_PM_SLEEP .suspend = ata_pci_device_suspend, - .resume = ata_pci_device_resume, + .resume = svia_pci_device_resume, #endif .remove = ata_pci_remove_one, }; @@ -137,6 +148,7 @@ static struct ata_port_operations vt6421_sata_ops = { .inherits = &svia_base_ops, .scr_read = svia_scr_read, .scr_write = svia_scr_write, + .error_handler = vt6421_error_handler, }; static struct ata_port_operations vt8251_ops = { @@ -536,7 +548,67 @@ static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) return 0; } -static void svia_configure(struct pci_dev *pdev, int board_id) +static void svia_wd_fix(struct pci_dev *pdev) +{ + u8 tmp8; + + pci_read_config_byte(pdev, 0x52, &tmp8); + pci_write_config_byte(pdev, 0x52, tmp8 | BIT(2)); +} + +static irqreturn_t vt6421_interrupt(int irq, void *dev_instance) +{ + struct ata_host *host = dev_instance; + irqreturn_t rc = ata_bmdma_interrupt(irq, dev_instance); + + /* if the IRQ was not handled, it might be a hotplug IRQ */ + if (rc != IRQ_HANDLED) { + u32 serror; + unsigned long flags; + + spin_lock_irqsave(&host->lock, flags); + /* check for hotplug on port 0 */ + svia_scr_read(&host->ports[0]->link, SCR_ERROR, &serror); + if (serror & SERR_PHYRDY_CHG) { + ata_ehi_hotplugged(&host->ports[0]->link.eh_info); + ata_port_freeze(host->ports[0]); + rc = IRQ_HANDLED; + } + /* check for hotplug on port 1 */ + svia_scr_read(&host->ports[1]->link, SCR_ERROR, &serror); + if (serror & SERR_PHYRDY_CHG) { + ata_ehi_hotplugged(&host->ports[1]->link.eh_info); + ata_port_freeze(host->ports[1]); + rc = IRQ_HANDLED; + } + spin_unlock_irqrestore(&host->lock, flags); + } + + return rc; +} + +static void vt6421_error_handler(struct ata_port *ap) +{ + struct svia_priv *hpriv = ap->host->private_data; + struct pci_dev *pdev = to_pci_dev(ap->host->dev); + u32 serror; + + /* see svia_configure() for description */ + if (!hpriv->wd_workaround) { + svia_scr_read(&ap->link, SCR_ERROR, &serror); + if (serror == 0x1000500) { + ata_port_warn(ap, "Incompatible drive: enabling workaround. This slows down transfer rate to ~60 MB/s"); + svia_wd_fix(pdev); + hpriv->wd_workaround = true; + ap->link.eh_context.i.flags |= ATA_EHI_QUIET; + } + } + + ata_sff_error_handler(ap); +} + +static void svia_configure(struct pci_dev *pdev, int board_id, + struct svia_priv *hpriv) { u8 tmp8; @@ -572,6 +644,16 @@ static void svia_configure(struct pci_dev *pdev, int board_id) pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); } + /* enable IRQ on hotplug */ + pci_read_config_byte(pdev, SVIA_MISC_3, &tmp8); + if ((tmp8 & SATA_HOTPLUG) != SATA_HOTPLUG) { + dev_dbg(&pdev->dev, + "enabling SATA hotplug (0x%x)\n", + (int) tmp8); + tmp8 |= SATA_HOTPLUG; + pci_write_config_byte(pdev, SVIA_MISC_3, tmp8); + } + /* * vt6420/1 has problems talking to some drives. The following * is the fix from Joseph Chan <JosephChan@via.com.tw>. @@ -593,11 +675,15 @@ static void svia_configure(struct pci_dev *pdev, int board_id) * https://bugzilla.kernel.org/show_bug.cgi?id=15173 * http://article.gmane.org/gmane.linux.ide/46352 * http://thread.gmane.org/gmane.linux.kernel/1062139 + * + * As the fix slows down data transfer, apply it only if the error + * actually appears - see vt6421_error_handler() + * Apply the fix always on vt6420 as we don't know if SCR_ERROR can be + * read safely. */ - if (board_id == vt6420 || board_id == vt6421) { - pci_read_config_byte(pdev, 0x52, &tmp8); - tmp8 |= 1 << 2; - pci_write_config_byte(pdev, 0x52, tmp8); + if (board_id == vt6420) { + svia_wd_fix(pdev); + hpriv->wd_workaround = true; } } @@ -608,6 +694,7 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) struct ata_host *host = NULL; int board_id = (int) ent->driver_data; const unsigned *bar_sizes; + struct svia_priv *hpriv; ata_print_version_once(&pdev->dev, DRV_VERSION); @@ -647,11 +734,39 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (rc) return rc; - svia_configure(pdev, board_id); + hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); + if (!hpriv) + return -ENOMEM; + host->private_data = hpriv; + + svia_configure(pdev, board_id, hpriv); pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, - IRQF_SHARED, &svia_sht); + if (board_id == vt6421) + return ata_host_activate(host, pdev->irq, vt6421_interrupt, + IRQF_SHARED, &svia_sht); + else + return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, + IRQF_SHARED, &svia_sht); +} + +#ifdef CONFIG_PM_SLEEP +static int svia_pci_device_resume(struct pci_dev *pdev) +{ + struct ata_host *host = pci_get_drvdata(pdev); + struct svia_priv *hpriv = host->private_data; + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + + if (hpriv->wd_workaround) + svia_wd_fix(pdev); + ata_host_resume(host); + + return 0; } +#endif module_pci_driver(svia_pci_driver); |