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path: root/drivers/clk/samsung/clk-exynos5420.c
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Diffstat (limited to 'drivers/clk/samsung/clk-exynos5420.c')
-rw-r--r--drivers/clk/samsung/clk-exynos5420.c29
1 files changed, 19 insertions, 10 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 3ccd4eabd2a6..caad74dee297 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1551,6 +1551,20 @@ static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = {
{ 0 },
};
+static const struct samsung_cpu_clock exynos5420_cpu_clks[] __initconst = {
+ CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MSPLL_CPU, 0, 0x200,
+ exynos5420_eglclk_d),
+ CPU_CLK(CLK_KFC_CLK, "kfcclk", CLK_MOUT_KPLL, CLK_MOUT_MSPLL_KFC, 0, 0x28200,
+ exynos5420_kfcclk_d),
+};
+
+static const struct samsung_cpu_clock exynos5800_cpu_clks[] __initconst = {
+ CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MSPLL_CPU, 0, 0x200,
+ exynos5800_eglclk_d),
+ CPU_CLK(CLK_KFC_CLK, "kfcclk", CLK_MOUT_KPLL, CLK_MOUT_MSPLL_KFC, 0, 0x28200,
+ exynos5420_kfcclk_d),
+};
+
static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
{ },
@@ -1580,7 +1594,7 @@ static void __init exynos5x_clk_init(struct device_node *np,
ARRAY_SIZE(exynos5x_fixed_rate_ext_clks),
ext_clk_match);
- if (_get_rate("fin_pll") == 24 * MHZ) {
+ if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24 * MHZ) {
exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl;
exynos5x_plls[epll].rate_table = exynos5420_epll_24mhz_tbl;
exynos5x_plls[kpll].rate_table = exynos5420_pll2550x_24mhz_tbl;
@@ -1625,17 +1639,12 @@ static void __init exynos5x_clk_init(struct device_node *np,
}
if (soc == EXYNOS5420) {
- exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
- hws[CLK_MOUT_APLL], hws[CLK_MOUT_MSPLL_CPU], 0x200,
- exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+ samsung_clk_register_cpu(ctx, exynos5420_cpu_clks,
+ ARRAY_SIZE(exynos5420_cpu_clks));
} else {
- exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
- hws[CLK_MOUT_APLL], hws[CLK_MOUT_MSPLL_CPU], 0x200,
- exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 0);
+ samsung_clk_register_cpu(ctx, exynos5800_cpu_clks,
+ ARRAY_SIZE(exynos5800_cpu_clks));
}
- exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
- hws[CLK_MOUT_KPLL], hws[CLK_MOUT_MSPLL_KFC], 0x28200,
- exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
samsung_clk_extended_sleep_init(reg_base,
exynos5x_clk_regs, ARRAY_SIZE(exynos5x_clk_regs),