diff options
Diffstat (limited to 'drivers/gpu/drm/display')
| -rw-r--r-- | drivers/gpu/drm/display/drm_dsc_helper.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/drivers/gpu/drm/display/drm_dsc_helper.c b/drivers/gpu/drm/display/drm_dsc_helper.c index c869c6e51e2b..be91abe2cfb2 100644 --- a/drivers/gpu/drm/display/drm_dsc_helper.c +++ b/drivers/gpu/drm/display/drm_dsc_helper.c @@ -270,6 +270,41 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, } EXPORT_SYMBOL(drm_dsc_pps_payload_pack); +/* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */ +static const u16 drm_dsc_rc_buf_thresh[] = { + 896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616, + 7744, 7872, 8000, 8064 +}; + +/** + * drm_dsc_set_rc_buf_thresh() - Set thresholds for the RC model + * in accordance with the DSC 1.2 specification. + * + * @vdsc_cfg: DSC Configuration data partially filled by driver + */ +void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg) +{ + int i; + + BUILD_BUG_ON(ARRAY_SIZE(drm_dsc_rc_buf_thresh) != + DSC_NUM_BUF_RANGES - 1); + BUILD_BUG_ON(ARRAY_SIZE(drm_dsc_rc_buf_thresh) != + ARRAY_SIZE(vdsc_cfg->rc_buf_thresh)); + + for (i = 0; i < ARRAY_SIZE(drm_dsc_rc_buf_thresh); i++) + vdsc_cfg->rc_buf_thresh[i] = drm_dsc_rc_buf_thresh[i] >> 6; + + /* + * For 6bpp, RC Buffer threshold 12 and 13 need a different value + * as per C Model + */ + if (vdsc_cfg->bits_per_pixel == 6 << 4) { + vdsc_cfg->rc_buf_thresh[12] = 7936 >> 6; + vdsc_cfg->rc_buf_thresh[13] = 8000 >> 6; + } +} +EXPORT_SYMBOL(drm_dsc_set_rc_buf_thresh); + /** * drm_dsc_compute_rc_parameters() - Write rate control * parameters to the dsc configuration defined in |