diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
86 files changed, 1174 insertions, 997 deletions
diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h index 1bf06c91cd95..5de0563b63d2 100644 --- a/drivers/gpu/drm/radeon/atom.h +++ b/drivers/gpu/drm/radeon/atom.h @@ -154,6 +154,13 @@ bool atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t *frev, uint8_t *crev); int atom_allocate_fb_scratch(struct atom_context *ctx); + +struct i2c_msg; +struct i2c_adapter; +int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, int num); +u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap); + #include "atom-types.h" #include "atombios.h" #include "ObjectID.h" diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 91811757104c..1979ed3d6547 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1787,7 +1787,6 @@ static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) * radeon_get_shared_nondp_ppll - return the PPLL used by another non-DP crtc * * @crtc: drm crtc - * @encoder: drm encoder * * Returns the PPLL (Pixel PLL) used by another non-DP crtc/encoder which can * be shared (i.e., same clock). diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index cc5ee1b3af84..683de198e18d 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -33,6 +33,7 @@ #include <drm/radeon_drm.h> #include "atom.h" +#include "radeon_atombios.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" @@ -296,10 +297,6 @@ static void radeon_atom_backlight_exit(struct radeon_encoder *encoder) #endif -/* evil but including atombios.h is much worse */ -bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, - struct drm_display_mode *mode); - static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c index d1d8aaf8323c..4e64ed38c439 100644 --- a/drivers/gpu/drm/radeon/btc_dpm.c +++ b/drivers/gpu/drm/radeon/btc_dpm.c @@ -29,7 +29,9 @@ #include "btc_dpm.h" #include "btcd.h" #include "cypress_dpm.h" +#include "evergreen.h" #include "r600_dpm.h" +#include "rv770.h" #include "radeon.h" #include "radeon_asic.h" @@ -48,10 +50,6 @@ #ifndef BTC_MGCG_SEQUENCE #define BTC_MGCG_SEQUENCE 300 -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - extern int ni_mc_load_microcode(struct radeon_device *rdev); //********* BARTS **************// diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 886e9959496f..f0cfb58da467 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -27,11 +27,13 @@ #include "atom.h" #include "ci_dpm.h" +#include "cik.h" #include "cikd.h" #include "r600_dpm.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_ucode.h" +#include "si_dpm.h" #define MC_CG_ARB_FREQ_F0 0x0a #define MC_CG_ARB_FREQ_F1 0x0b @@ -152,17 +154,6 @@ static const struct ci_pt_config_reg didt_config_ci[] = extern u8 rv770_get_memory_module_index(struct radeon_device *rdev); extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev, u32 arb_freq_src, u32 arb_freq_dest); -extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock); -extern u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode); -extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, - u32 max_voltage_steps, - struct atom_voltage_table *voltage_table); -extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); -extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); -extern int ci_mc_load_microcode(struct radeon_device *rdev); -extern void cik_update_cg(struct radeon_device *rdev, - u32 block, bool enable); - static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev, struct atom_voltage_table_entry *voltage_table, u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd); @@ -1366,7 +1357,6 @@ static void ci_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) { struct ci_power_info *pi = ci_get_pi(rdev); bool want_thermal_protection; - enum radeon_dpm_event_src dpm_event_src; u32 tmp; switch (sources) { @@ -1376,28 +1366,17 @@ static void ci_set_dpm_event_sources(struct radeon_device *rdev, u32 sources) break; case (1 << RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL): want_thermal_protection = true; - dpm_event_src = RADEON_DPM_EVENT_SRC_DIGITAL; break; case (1 << RADEON_DPM_AUTO_THROTTLE_SRC_EXTERNAL): want_thermal_protection = true; - dpm_event_src = RADEON_DPM_EVENT_SRC_EXTERNAL; break; case ((1 << RADEON_DPM_AUTO_THROTTLE_SRC_EXTERNAL) | (1 << RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL)): want_thermal_protection = true; - dpm_event_src = RADEON_DPM_EVENT_SRC_DIGIAL_OR_EXTERNAL; break; } if (want_thermal_protection) { -#if 0 - /* XXX: need to figure out how to handle this properly */ - tmp = RREG32_SMC(CG_THERMAL_CTRL); - tmp &= DPM_EVENT_SRC_MASK; - tmp |= DPM_EVENT_SRC(dpm_event_src); - WREG32_SMC(CG_THERMAL_CTRL, tmp); -#endif - tmp = RREG32_SMC(GENERAL_PWRMGT); if (pi->thermal_protection) tmp &= ~THERMAL_PROTECTION_DIS; @@ -4860,8 +4839,8 @@ static void ci_request_link_speed_change_before_state_change(struct radeon_devic case RADEON_PCIE_GEN2: if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0) break; + fallthrough; #endif - /* fall through */ default: pi->force_pcie_gen = ci_get_current_pcie_speed(rdev); break; diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 5c42877fd6fb..8b7a4f7b7576 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -30,13 +30,18 @@ #include <drm/drm_vblank.h> #include "atom.h" +#include "evergreen.h" #include "cik_blit_shaders.h" +#include "cik.h" #include "cikd.h" #include "clearstate_ci.h" +#include "r600.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" #include "radeon_ucode.h" +#include "si.h" +#include "vce.h" #define SH_MEM_CONFIG_GFX_DEFAULT \ ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED) @@ -124,21 +129,7 @@ MODULE_FIRMWARE("radeon/mullins_mec.bin"); MODULE_FIRMWARE("radeon/mullins_rlc.bin"); MODULE_FIRMWARE("radeon/mullins_sdma.bin"); -extern int r600_ih_ring_alloc(struct radeon_device *rdev); -extern void r600_ih_ring_fini(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern bool evergreen_is_display_hung(struct radeon_device *rdev); -extern void sumo_rlc_fini(struct radeon_device *rdev); -extern int sumo_rlc_init(struct radeon_device *rdev); -extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); -extern void si_rlc_reset(struct radeon_device *rdev); -extern void si_init_uvd_internal_cg(struct radeon_device *rdev); static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); -extern int cik_sdma_resume(struct radeon_device *rdev); -extern void cik_sdma_enable(struct radeon_device *rdev, bool enable); -extern void cik_sdma_fini(struct radeon_device *rdev); -extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); static void cik_rlc_stop(struct radeon_device *rdev); static void cik_pcie_gen3_enable(struct radeon_device *rdev); static void cik_program_aspm(struct radeon_device *rdev); @@ -3071,8 +3062,7 @@ static u32 cik_create_bitmask(u32 bit_width) * cik_get_rb_disabled - computes the mask of disabled RBs * * @rdev: radeon_device pointer - * @max_rb_num: max RBs (render backends) for the asic - * @se_num: number of SEs (shader engines) for the asic + * @max_rb_num_per_se: max RBs (render backends) per SE (shader engine) for the asic * @sh_per_se: number of SH blocks per SE for the asic * * Calculates the bitmask of disabled RBs (CIK). @@ -3104,7 +3094,7 @@ static u32 cik_get_rb_disabled(struct radeon_device *rdev, * @rdev: radeon_device pointer * @se_num: number of SEs (shader engines) for the asic * @sh_per_se: number of SH blocks per SE for the asic - * @max_rb_num: max RBs (render backends) for the asic + * @max_rb_num_per_se: max RBs (render backends) per SE for the asic * * Configures per-SE/SH RB registers (CIK). */ @@ -3178,7 +3168,7 @@ static void cik_setup_rb(struct radeon_device *rdev, static void cik_gpu_init(struct radeon_device *rdev) { u32 gb_addr_config = RREG32(GB_ADDR_CONFIG); - u32 mc_shared_chmap, mc_arb_ramcfg; + u32 mc_arb_ramcfg; u32 hdp_host_path_cntl; u32 tmp; int i, j; @@ -3271,7 +3261,7 @@ static void cik_gpu_init(struct radeon_device *rdev) WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); - mc_shared_chmap = RREG32(MC_SHARED_CHMAP); + RREG32(MC_SHARED_CHMAP); mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; @@ -5654,6 +5644,7 @@ void cik_vm_fini(struct radeon_device *rdev) * @rdev: radeon_device pointer * @status: VM_CONTEXT1_PROTECTION_FAULT_STATUS register value * @addr: VM_CONTEXT1_PROTECTION_FAULT_ADDR register value + * @mc_client: VM_CONTEXT1_PROTECTION_FAULT_MCCLIENT register value * * Print human readable fault information (CIK). */ @@ -5677,11 +5668,9 @@ static void cik_vm_decode_fault(struct radeon_device *rdev, block, mc_client, mc_id); } -/** +/* * cik_vm_flush - cik vm flush using the CP * - * @rdev: radeon_device pointer - * * Update the page table base and flush the VM TLB * using the CP (CIK). */ diff --git a/drivers/gpu/drm/radeon/cik.h b/drivers/gpu/drm/radeon/cik.h new file mode 100644 index 000000000000..d1bf541da592 --- /dev/null +++ b/drivers/gpu/drm/radeon/cik.h @@ -0,0 +1,40 @@ +/* cik.h -- Private header for radeon driver -*- linux-c -*- + * Copyright 2012 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __CIK_H__ +#define __CIK_H__ + +struct radeon_device; + +void cik_enter_rlc_safe_mode(struct radeon_device *rdev); +void cik_exit_rlc_safe_mode(struct radeon_device *rdev); +int ci_mc_load_microcode(struct radeon_device *rdev); +void cik_update_cg(struct radeon_device *rdev, u32 block, bool enable); +u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); +void cik_init_cp_pg_table(struct radeon_device *rdev); +u32 cik_get_csb_size(struct radeon_device *rdev); +void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); + +int cik_sdma_resume(struct radeon_device *rdev); +void cik_sdma_enable(struct radeon_device *rdev, bool enable); +void cik_sdma_fini(struct radeon_device *rdev); +#endif /* __CIK_H__ */ diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 68403e77756d..919b14845c3c 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c @@ -27,14 +27,13 @@ #include "radeon_ucode.h" #include "radeon_asic.h" #include "radeon_trace.h" +#include "cik.h" #include "cikd.h" /* sdma */ #define CIK_SDMA_UCODE_SIZE 1050 #define CIK_SDMA_UCODE_VERSION 64 -u32 cik_gpu_check_soft_reset(struct radeon_device *rdev); - /* * sDMA - System DMA * Starting with CIK, the GPU has new asynchronous @@ -936,11 +935,9 @@ void cik_sdma_vm_pad_ib(struct radeon_ib *ib) ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0); } -/** +/* * cik_dma_vm_flush - cik vm flush using sDMA * - * @rdev: radeon_device pointer - * * Update the page table base and flush the VM TLB * using sDMA (CIK). */ diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c index 35b177d77791..fdddbbaecbb7 100644 --- a/drivers/gpu/drm/radeon/cypress_dpm.c +++ b/drivers/gpu/drm/radeon/cypress_dpm.c @@ -26,8 +26,10 @@ #include "atom.h" #include "cypress_dpm.h" +#include "evergreen.h" #include "evergreend.h" #include "r600_dpm.h" +#include "rv770.h" #include "radeon.h" #include "radeon_asic.h" @@ -43,10 +45,6 @@ #define MC_CG_SEQ_YCLK_SUSPEND 0x04 #define MC_CG_SEQ_YCLK_RESUME 0x0a -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - static void cypress_enable_bif_dynamic_pcie_gen2(struct radeon_device *rdev, bool enable) { diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c index eec5d7a62738..4a1d5447eac1 100644 --- a/drivers/gpu/drm/radeon/dce6_afmt.c +++ b/drivers/gpu/drm/radeon/dce6_afmt.c @@ -22,6 +22,7 @@ */ #include <linux/hdmi.h> +#include "dce6_afmt.h" #include "radeon.h" #include "radeon_audio.h" #include "sid.h" diff --git a/drivers/gpu/drm/radeon/dce6_afmt.h b/drivers/gpu/drm/radeon/dce6_afmt.h new file mode 100644 index 000000000000..176a538664a2 --- /dev/null +++ b/drivers/gpu/drm/radeon/dce6_afmt.h @@ -0,0 +1,52 @@ +/* dce6_afmt.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2013 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __DCE6_AFMT_H__ +#define __DCE6_AFMT_H__ + +struct cea_sad; +struct drm_connector; +struct drm_display_mode; +struct drm_encoder; +struct radeon_crtc; +struct radeon_device; + +u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); +void dce6_endpoint_wreg(struct radeon_device *rdev, u32 offset, u32 reg, u32 v); +void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, + struct cea_sad *sads, int sad_count); +void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, + struct drm_connector *connector, + struct drm_display_mode *mode); +void dce6_afmt_select_pin(struct drm_encoder *encoder); +void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce6_dp_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); + +#endif /* __DCE6_AFMT_H__ */ diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14d90dc376e7..8e9e88bf1f43 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -31,6 +31,10 @@ #include "atom.h" #include "avivod.h" +#include "cik.h" +#include "ni.h" +#include "rv770.h" +#include "evergreen.h" #include "evergreen_blit_shaders.h" #include "evergreen_reg.h" #include "evergreend.h" @@ -38,6 +42,7 @@ #include "radeon_asic.h" #include "radeon_audio.h" #include "radeon_ucode.h" +#include "si.h" #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc)) #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc)) @@ -213,17 +218,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev); void evergreen_fini(struct radeon_device *rdev); void evergreen_pcie_gen2_enable(struct radeon_device *rdev); void evergreen_program_aspm(struct radeon_device *rdev); -extern void cayman_cp_int_cntl_setup(struct radeon_device *rdev, - int ring, u32 cp_int_cntl); -extern void cayman_vm_decode_fault(struct radeon_device *rdev, - u32 status, u32 addr); -void cik_init_cp_pg_table(struct radeon_device *rdev); - -extern u32 si_get_csb_size(struct radeon_device *rdev); -extern void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); -extern u32 cik_get_csb_size(struct radeon_device *rdev); -extern void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); -extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); static const u32 evergreen_golden_registers[] = { @@ -1411,6 +1405,7 @@ void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc) * @rdev: radeon_device pointer * @crtc_id: crtc to cleanup pageflip on * @crtc_base: new address of the crtc (GPU MC address) + * @async: asynchronous flip * * Triggers the actual pageflip by updating the primary * surface base address (evergreen+). @@ -3133,7 +3128,7 @@ static int evergreen_cp_resume(struct radeon_device *rdev) static void evergreen_gpu_init(struct radeon_device *rdev) { u32 gb_addr_config; - u32 mc_shared_chmap, mc_arb_ramcfg; + u32 mc_arb_ramcfg; u32 sx_debug_1; u32 smx_dc_ctl0; u32 sq_config; @@ -3397,7 +3392,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) evergreen_fix_pci_max_read_req_size(rdev); - mc_shared_chmap = RREG32(MC_SHARED_CHMAP); + RREG32(MC_SHARED_CHMAP); if ((rdev->family == CHIP_PALM) || (rdev->family == CHIP_SUMO) || (rdev->family == CHIP_SUMO2)) diff --git a/drivers/gpu/drm/radeon/evergreen.h b/drivers/gpu/drm/radeon/evergreen.h new file mode 100644 index 000000000000..4025a4e474d1 --- /dev/null +++ b/drivers/gpu/drm/radeon/evergreen.h @@ -0,0 +1,53 @@ +/* radeon_evergreen.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2010 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_EVERGREEN_H__ +#define __RADEON_EVERGREEN_H__ + +struct evergreen_mc_save; +struct evergreen_power_info; +struct radeon_device; + +bool evergreen_is_display_hung(struct radeon_device *rdev); +void evergreen_print_gpu_status_regs(struct radeon_device *rdev); +void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); +void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); +int evergreen_mc_wait_for_idle(struct radeon_device *rdev); +void evergreen_mc_program(struct radeon_device *rdev); +void evergreen_irq_suspend(struct radeon_device *rdev); +int evergreen_mc_init(struct radeon_device *rdev); +void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); +void evergreen_pcie_gen2_enable(struct radeon_device *rdev); +void evergreen_program_aspm(struct radeon_device *rdev); +void sumo_rlc_fini(struct radeon_device *rdev); +int sumo_rlc_init(struct radeon_device *rdev); +void evergreen_gpu_pci_config_reset(struct radeon_device *rdev); +u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); +void evergreen_print_gpu_status_regs(struct radeon_device *rdev); +u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev); +int evergreen_rlc_resume(struct radeon_device *rdev); +struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); + +#endif /* __RADEON_EVERGREEN_H__ */ diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index c410cad28f19..0de79f3a7e3f 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -28,6 +28,7 @@ #include "radeon.h" #include "radeon_asic.h" +#include "r600.h" #include "evergreend.h" #include "evergreen_reg_safe.h" #include "cayman_reg_safe.h" @@ -37,8 +38,6 @@ #define REG_SAFE_BM_SIZE ARRAY_SIZE(evergreen_reg_safe_bm) -int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, - struct radeon_bo_list **cs_reloc); struct evergreen_cs_track { u32 group_size; u32 nbanks; @@ -1015,7 +1014,7 @@ static int evergreen_cs_track_check(struct radeon_cs_parser *p) /** * evergreen_cs_packet_parse_vline() - parse userspace VLINE packet - * @parser: parser structure holding parsing context. + * @p: parser structure holding parsing context. * * This is an Evergreen(+)-specific function for parsing VLINE packets. * Real work is done by r600_cs_common_vline_parse function. @@ -1087,7 +1086,7 @@ static int evergreen_cs_parse_packet0(struct radeon_cs_parser *p, /** * evergreen_cs_handle_reg() - process registers that need special handling. - * @parser: parser structure holding parsing context + * @p: parser structure holding parsing context * @reg: register we are testing * @idx: index into the cs buffer */ @@ -1747,7 +1746,7 @@ static int evergreen_cs_handle_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) /** * evergreen_is_safe_reg() - check if register is authorized or not - * @parser: parser structure holding parsing context + * @p: parser structure holding parsing context * @reg: register we are testing * * This function will test against reg_safe_bm and return true diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c index a46ee6c2099d..52c79da1ecf5 100644 --- a/drivers/gpu/drm/radeon/evergreen_dma.c +++ b/drivers/gpu/drm/radeon/evergreen_dma.c @@ -24,10 +24,9 @@ #include "radeon.h" #include "radeon_asic.h" +#include "evergreen.h" #include "evergreend.h" -u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev); - /** * evergreen_dma_fence_ring_emit - emit a fence on the DMA ring * @@ -98,7 +97,7 @@ void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, * @src_offset: src GPU address * @dst_offset: dst GPU address * @num_gpu_pages: number of GPU pages to xfer - * @fence: radeon fence object + * @resv: reservation object with embedded fence * * Copy GPU paging using the DMA engine (evergreen-cayman). * Used by the radeon ttm implementation to move pages if diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c index 739336a48d08..5f3078f8ab95 100644 --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c @@ -27,6 +27,7 @@ #include <linux/hdmi.h> #include <drm/radeon_drm.h> +#include "evergreen_hdmi.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.h b/drivers/gpu/drm/radeon/evergreen_hdmi.h new file mode 100644 index 000000000000..a869444cfedf --- /dev/null +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.h @@ -0,0 +1,69 @@ +/* evergreen_hdmi.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2008 Advanced Micro Devices, Inc. + * Copyright 2008 Red Hat Inc. + * Copyright 2009 Christian König. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __EVERGREEN_HDMI_H__ +#define __EVERGREEN_HDMI_H__ + +struct cea_sa; +struct cea_sad; +struct drm_connector; +struct drm_display_mode; +struct drm_encoder; +struct r600_audio_pin; +struct radeon_crtc; +struct radeon_device; +struct radeon_hdmi_acr; + +void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, + struct cea_sad *sads, int sad_count); +void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, + unsigned char *buffer, size_t size); +void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); +void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); + +void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, + u8 enable_mask); +void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, + struct drm_connector *connector, + struct drm_display_mode *mode); +void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce4_dp_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); +void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, + u32 offset, int bpc); +void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); + +#endif /* __EVERGREEN_HDMI_H__ */ diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index 5e6086eb1807..f7735da07feb 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c @@ -64,105 +64,6 @@ extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); extern void cik_update_cg(struct radeon_device *rdev, u32 block, bool enable); -static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 1, 4, 1 }, - { 2, 5, 1 }, - { 3, 4, 2 }, - { 4, 1, 1 }, - { 5, 5, 2 }, - { 6, 6, 1 }, - { 7, 9, 2 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_values mc0_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_values mc1_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_values mc2_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_values mc3_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_values cpl_local_cac_cfg_kv[] = -{ - { 0, 4, 1 }, - { 1, 4, 1 }, - { 2, 5, 1 }, - { 3, 4, 1 }, - { 4, 1, 1 }, - { 5, 5, 1 }, - { 6, 6, 1 }, - { 7, 9, 1 }, - { 8, 4, 1 }, - { 9, 2, 1 }, - { 10, 3, 1 }, - { 11, 6, 1 }, - { 12, 8, 2 }, - { 13, 1, 1 }, - { 14, 2, 1 }, - { 15, 3, 1 }, - { 16, 1, 1 }, - { 17, 4, 1 }, - { 18, 3, 1 }, - { 19, 1, 1 }, - { 20, 8, 1 }, - { 21, 5, 1 }, - { 22, 1, 1 }, - { 23, 1, 1 }, - { 24, 4, 1 }, - { 27, 6, 1 }, - { 28, 1, 1 }, - { 0xffffffff } -}; - -static const struct kv_lcac_config_reg sx0_cac_config_reg[] = -{ - { 0xc0400d00, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - -static const struct kv_lcac_config_reg mc0_cac_config_reg[] = -{ - { 0xc0400d30, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - -static const struct kv_lcac_config_reg mc1_cac_config_reg[] = -{ - { 0xc0400d3c, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - -static const struct kv_lcac_config_reg mc2_cac_config_reg[] = -{ - { 0xc0400d48, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - -static const struct kv_lcac_config_reg mc3_cac_config_reg[] = -{ - { 0xc0400d54, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - -static const struct kv_lcac_config_reg cpl_cac_config_reg[] = -{ - { 0xc0400d80, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, 0 } -}; - static const struct kv_pt_config_reg didt_config_kv[] = { { 0x10, 0x000000ff, 0, 0x0, KV_CONFIGREG_DIDT_IND }, @@ -254,32 +155,6 @@ static struct kv_power_info *kv_get_pi(struct radeon_device *rdev) return pi; } -#if 0 -static void kv_program_local_cac_table(struct radeon_device *rdev, - const struct kv_lcac_config_values *local_cac_table, - const struct kv_lcac_config_reg *local_cac_reg) -{ - u32 i, count, data; - const struct kv_lcac_config_values *values = local_cac_table; - - while (values->block_id != 0xffffffff) { - count = values->signal_id; - for (i = 0; i < count; i++) { - data = ((values->block_id << local_cac_reg->block_shift) & - local_cac_reg->block_mask); - data |= ((i << local_cac_reg->signal_shift) & - local_cac_reg->signal_mask); - data |= ((values->t << local_cac_reg->t_shift) & - local_cac_reg->t_mask); - data |= ((1 << local_cac_reg->enable_shift) & - local_cac_reg->enable_mask); - WREG32_SMC(local_cac_reg->cntl, data); - } - values++; - } -} -#endif - static int kv_program_pt_config_registers(struct radeon_device *rdev, const struct kv_pt_config_reg *cac_config_regs) { @@ -398,39 +273,6 @@ static int kv_enable_didt(struct radeon_device *rdev, bool enable) return 0; } -#if 0 -static void kv_initialize_hardware_cac_manager(struct radeon_device *rdev) -{ - struct kv_power_info *pi = kv_get_pi(rdev); - - if (pi->caps_cac) { - WREG32_SMC(LCAC_SX0_OVR_SEL, 0); - WREG32_SMC(LCAC_SX0_OVR_VAL, 0); - kv_program_local_cac_table(rdev, sx_local_cac_cfg_kv, sx0_cac_config_reg); - - WREG32_SMC(LCAC_MC0_OVR_SEL, 0); - WREG32_SMC(LCAC_MC0_OVR_VAL, 0); - kv_program_local_cac_table(rdev, mc0_local_cac_cfg_kv, mc0_cac_config_reg); - - WREG32_SMC(LCAC_MC1_OVR_SEL, 0); - WREG32_SMC(LCAC_MC1_OVR_VAL, 0); - kv_program_local_cac_table(rdev, mc1_local_cac_cfg_kv, mc1_cac_config_reg); - - WREG32_SMC(LCAC_MC2_OVR_SEL, 0); - WREG32_SMC(LCAC_MC2_OVR_VAL, 0); - kv_program_local_cac_table(rdev, mc2_local_cac_cfg_kv, mc2_cac_config_reg); - - WREG32_SMC(LCAC_MC3_OVR_SEL, 0); - WREG32_SMC(LCAC_MC3_OVR_VAL, 0); - kv_program_local_cac_table(rdev, mc3_local_cac_cfg_kv, mc3_cac_config_reg); - - WREG32_SMC(LCAC_CPL_OVR_SEL, 0); - WREG32_SMC(LCAC_CPL_OVR_VAL, 0); - kv_program_local_cac_table(rdev, cpl_local_cac_cfg_kv, cpl_cac_config_reg); - } -} -#endif - static int kv_enable_smc_cac(struct radeon_device *rdev, bool enable) { struct kv_power_info *pi = kv_get_pi(rdev); @@ -1227,9 +1069,7 @@ int kv_dpm_enable(struct radeon_device *rdev) return ret; } kv_program_vc(rdev); -#if 0 - kv_initialize_hardware_cac_manager(rdev); -#endif + kv_start_am(rdev); if (pi->enable_auto_thermal_throttling) { ret = kv_enable_auto_thermal_throttling(rdev); @@ -1330,26 +1170,6 @@ void kv_dpm_disable(struct radeon_device *rdev) kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); } -#if 0 -static int kv_write_smc_soft_register(struct radeon_device *rdev, - u16 reg_offset, u32 value) -{ - struct kv_power_info *pi = kv_get_pi(rdev); - - return kv_copy_bytes_to_smc(rdev, pi->soft_regs_start + reg_offset, - (u8 *)&value, sizeof(u16), pi->sram_end); -} - -static int kv_read_smc_soft_register(struct radeon_device *rdev, - u16 reg_offset, u32 *value) -{ - struct kv_power_info *pi = kv_get_pi(rdev); - - return kv_read_smc_sram_dword(rdev, pi->soft_regs_start + reg_offset, - value, pi->sram_end); -} -#endif - static void kv_init_sclk_t(struct radeon_device *rdev) { struct kv_power_info *pi = kv_get_pi(rdev); @@ -1939,29 +1759,6 @@ void kv_dpm_setup_asic(struct radeon_device *rdev) kv_init_sclk_t(rdev); } -#if 0 -void kv_dpm_reset_asic(struct radeon_device *rdev) -{ - struct kv_power_info *pi = kv_get_pi(rdev); - - if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { - kv_force_lowest_valid(rdev); - kv_init_graphics_levels(rdev); - kv_program_bootup_state(rdev); - kv_upload_dpm_settings(rdev); - kv_force_lowest_valid(rdev); - kv_unforce_levels(rdev); - } else { - kv_init_graphics_levels(rdev); - kv_program_bootup_state(rdev); - kv_freeze_sclk_dpm(rdev, true); - kv_upload_dpm_settings(rdev); - kv_freeze_sclk_dpm(rdev, false); - kv_set_enabled_level(rdev, pi->graphics_boot_level); - } -} -#endif - //XXX use sumo_dpm_display_configuration_changed static void kv_construct_max_power_limits_table(struct radeon_device *rdev, diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 02feb0801fd3..ab7bd3080217 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -32,6 +32,8 @@ #include "atom.h" #include "cayman_blit_shaders.h" #include "clearstate_cayman.h" +#include "evergreen.h" +#include "ni.h" #include "ni_reg.h" #include "nid.h" #include "radeon.h" @@ -190,21 +192,6 @@ static const u32 tn_rlc_save_restore_register_list[] = 0x802c, }; -extern bool evergreen_is_display_hung(struct radeon_device *rdev); -extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); -extern void evergreen_mc_program(struct radeon_device *rdev); -extern void evergreen_irq_suspend(struct radeon_device *rdev); -extern int evergreen_mc_init(struct radeon_device *rdev); -extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); -extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); -extern void evergreen_program_aspm(struct radeon_device *rdev); -extern void sumo_rlc_fini(struct radeon_device *rdev); -extern int sumo_rlc_init(struct radeon_device *rdev); -extern void evergreen_gpu_pci_config_reset(struct radeon_device *rdev); - /* Firmware Names */ MODULE_FIRMWARE("radeon/BARTS_pfp.bin"); MODULE_FIRMWARE("radeon/BARTS_me.bin"); @@ -891,7 +878,7 @@ int tn_get_temp(struct radeon_device *rdev) static void cayman_gpu_init(struct radeon_device *rdev) { u32 gb_addr_config = 0; - u32 mc_shared_chmap, mc_arb_ramcfg; + u32 mc_arb_ramcfg; u32 cgts_tcc_disable; u32 sx_debug_1; u32 smx_dc_ctl0; @@ -1016,7 +1003,7 @@ static void cayman_gpu_init(struct radeon_device *rdev) evergreen_fix_pci_max_read_req_size(rdev); - mc_shared_chmap = RREG32(MC_SHARED_CHMAP); + RREG32(MC_SHARED_CHMAP); mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; @@ -2682,11 +2669,9 @@ void cayman_vm_decode_fault(struct radeon_device *rdev, block, mc_id); } -/** +/* * cayman_vm_flush - vm flush using the CP * - * @rdev: radeon_device pointer - * * Update the page table base and flush the VM TLB * using the CP (cayman-si). */ diff --git a/drivers/gpu/drm/radeon/ni.h b/drivers/gpu/drm/radeon/ni.h new file mode 100644 index 000000000000..e2f9617a1244 --- /dev/null +++ b/drivers/gpu/drm/radeon/ni.h @@ -0,0 +1,37 @@ +/* ni.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2010 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __NI_H__ +#define __NI_H__ + +struct radeon_device; + +void cayman_cp_int_cntl_setup(struct radeon_device *rdev, + int ring, u32 cp_int_cntl); +void cayman_vm_decode_fault(struct radeon_device *rdev, + u32 status, u32 addr); +u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); + +#endif /* __NI_H__ */ diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index c56136848360..bd515ad4fe4c 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c @@ -25,10 +25,9 @@ #include "radeon.h" #include "radeon_asic.h" #include "radeon_trace.h" +#include "ni.h" #include "nid.h" -u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); - /* * DMA * Starting with R600, the GPU has an asynchronous diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 59cdadcece15..dd5ef6493723 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c @@ -26,9 +26,11 @@ #include <linux/seq_file.h> #include "atom.h" +#include "evergreen.h" #include "ni_dpm.h" #include "nid.h" #include "r600_dpm.h" +#include "rv770.h" #include "radeon.h" #include "radeon_asic.h" @@ -719,9 +721,6 @@ static const u32 cayman_sysls_enable[] = }; #define CAYMAN_SYSLS_ENABLE_LENGTH sizeof(cayman_sysls_enable) / (3 * sizeof(u32)) -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); - extern int ni_mc_load_microcode(struct radeon_device *rdev); struct ni_power_info *ni_get_pi(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/ni_dpm.h b/drivers/gpu/drm/radeon/ni_dpm.h index 6bbee9180909..74e301936906 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.h +++ b/drivers/gpu/drm/radeon/ni_dpm.h @@ -247,4 +247,7 @@ void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev, bool ni_dpm_vblank_too_short(struct radeon_device *rdev); +struct ni_power_info *ni_get_pi(struct radeon_device *rdev); +struct ni_ps *ni_get_ps(struct radeon_ps *rps); + #endif diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 24c8db673931..aef4efc692b1 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -153,6 +153,7 @@ void r100_wait_for_vblank(struct radeon_device *rdev, int crtc) * @rdev: radeon_device pointer * @crtc_id: crtc to cleanup pageflip on * @crtc_base: new address of the crtc (GPU MC address) + * @async: asynchronous flip * * Does the actual pageflip (r1xx-r4xx). * During vblank we take the crtc lock and wait for the update_pending @@ -841,8 +842,8 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc) /** * r100_ring_hdp_flush - flush Host Data Path via the ring buffer - * rdev: radeon device structure - * ring: ring buffer struct for emitting packets + * @rdev: radeon device structure + * @ring: ring buffer struct for emitting packets */ static void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring) { @@ -1409,7 +1410,7 @@ int r100_cs_parse_packet0(struct radeon_cs_parser *p, /** * r100_cs_packet_next_vline() - parse userspace VLINE packet - * @parser: parser structure holding parsing context. + * @p: parser structure holding parsing context. * * Userspace sends a special sequence for VLINE waits. * PACKET0 - VLINE_START_END + value diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 73f67bf222e1..213dc49b6322 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -1162,6 +1162,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, /* valid register only on RV530 */ if (p->rdev->family == CHIP_RV530) break; + fallthrough; /* fallthrough do not move */ default: goto fail; diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d9a33ca768f3..b44e0c607b1b 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -39,7 +39,10 @@ #include "atom.h" #include "avivod.h" +#include "evergreen.h" +#include "r600.h" #include "r600d.h" +#include "rv770.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" @@ -111,8 +114,6 @@ static void r600_gpu_init(struct radeon_device *rdev); void r600_fini(struct radeon_device *rdev); void r600_irq_disable(struct radeon_device *rdev); static void r600_pcie_gen2_enable(struct radeon_device *rdev); -extern int evergreen_rlc_resume(struct radeon_device *rdev); -extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); /* * Indirect registers accessor @@ -1080,7 +1081,6 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev) if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) && !(rdev->flags & RADEON_IS_AGP)) { void __iomem *ptr = (void *)rdev->gart.ptr; - u32 tmp; /* r7xx hw bug. write to HDP_DEBUG1 followed by fb read * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL @@ -1088,7 +1088,7 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev) * method for them. */ WREG32(HDP_DEBUG1, 0); - tmp = readl((void __iomem *)ptr); + readl((void __iomem *)ptr); } else WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); @@ -2954,7 +2954,7 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev, * @src_offset: src GPU address * @dst_offset: dst GPU address * @num_gpu_pages: number of GPU pages to xfer - * @fence: radeon fence object + * @resv: DMA reservation object to manage fences * * Copy GPU paging using the CP DMA engine (r6xx+). * Used by the radeon ttm implementation to move pages if @@ -4373,7 +4373,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev) /** * r600_mmio_hdp_flush - flush Host Data Path cache via MMIO - * rdev: radeon device structure + * @rdev: radeon device structure * * Some R6XX/R7XX don't seem to take into account HDP flushes performed * through the ring buffer. This leads to corruption in rendering, see @@ -4390,10 +4390,9 @@ void r600_mmio_hdp_flush(struct radeon_device *rdev) if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) && rdev->vram_scratch.ptr && !(rdev->flags & RADEON_IS_AGP)) { void __iomem *ptr = (void *)rdev->vram_scratch.ptr; - u32 tmp; WREG32(HDP_DEBUG1, 0); - tmp = readl((void __iomem *)ptr); + readl((void __iomem *)ptr); } else WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); } diff --git a/drivers/gpu/drm/radeon/r600.h b/drivers/gpu/drm/radeon/r600.h new file mode 100644 index 000000000000..c3e7ef4e0e03 --- /dev/null +++ b/drivers/gpu/drm/radeon/r600.h @@ -0,0 +1,58 @@ +/* r600.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2008 Advanced Micro Devices, Inc. + * Copyright 2008 Red Hat Inc. + * Copyright 2009 Jerome Glisse. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __R600_H__ +#define __R600_H__ + +struct radeon_bo_list; +struct radeon_cs_parser; +struct r600_audio_pin; +struct radeon_crtc; +struct radeon_device; +struct radeon_hdmi_acr; + +u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); +int r600_ih_ring_alloc(struct radeon_device *rdev); +void r600_ih_ring_fini(struct radeon_device *rdev); + +void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, + u8 enable_mask); +void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); +void r600_hdmi_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, + unsigned char *buffer, size_t size); +void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); +void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); + +int r600_dma_cs_next_reloc(struct radeon_cs_parser *p, + struct radeon_bo_list **cs_reloc); + +#endif /* __R600_H__ */ diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 390a9621604a..dc68e538d5a9 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -29,6 +29,7 @@ #include "radeon.h" #include "radeon_asic.h" +#include "r600.h" #include "r600d.h" #include "r600_reg_safe.h" @@ -782,7 +783,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) /** * r600_cs_packet_parse_vline() - parse userspace VLINE packet - * @parser: parser structure holding parsing context. + * @p: parser structure holding parsing context. * * This is an R600-specific function for parsing VLINE packets. * Real work is done by r600_cs_common_vline_parse function. @@ -801,7 +802,7 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p) /** * r600_cs_common_vline_parse() - common vline parser - * @parser: parser structure holding parsing context. + * @p: parser structure holding parsing context. * @vline_start_end: table of vline_start_end registers * @vline_status: table of vline_status registers * @@ -956,7 +957,7 @@ static int r600_cs_parse_packet0(struct radeon_cs_parser *p, /** * r600_cs_check_reg() - check if register is authorized or not - * @parser: parser structure holding parsing context + * @p: parser structure holding parsing context * @reg: register we are testing * @idx: index into the cs buffer * @@ -1460,6 +1461,9 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, * @idx: index into the cs buffer * @texture: texture's bo structure * @mipmap: mipmap's bo structure + * @base_offset: base offset (used for error checking) + * @mip_offset: mip offset (used for error checking) + * @tiling_flags: tiling flags * * This function will check that the resource has valid field and that * the texture and mipmap bo object are big enough to cover this resource. diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index af6c0da45f28..89ca2738c5d4 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c @@ -24,10 +24,9 @@ #include "radeon.h" #include "radeon_asic.h" +#include "r600.h" #include "r600d.h" -u32 r600_gpu_check_soft_reset(struct radeon_device *rdev); - /* * DMA * Starting with R600, the GPU has an asynchronous diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index c09549d785b5..f3551ebaa2f0 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -30,6 +30,7 @@ #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" +#include "r600.h" #include "r600d.h" #include "atom.h" diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index a6d8de01194a..5f3adba43e47 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -497,7 +497,6 @@ struct radeon_bo { struct ttm_buffer_object tbo; struct ttm_bo_kmap_obj kmap; u32 flags; - unsigned pin_count; void *kptr; u32 tiling_flags; u32 pitch; @@ -510,7 +509,6 @@ struct radeon_bo { /* Constant after initialization */ struct radeon_device *rdev; - struct ttm_bo_kmap_obj dma_buf_vmap; pid_t pid; #ifdef CONFIG_MMU_NOTIFIER @@ -1992,6 +1990,7 @@ struct radeon_asic { int (*get_fan_speed_percent)(struct radeon_device *rdev, u32 *speed); u32 (*get_current_sclk)(struct radeon_device *rdev); u32 (*get_current_mclk)(struct radeon_device *rdev); + u16 (*get_current_vddc)(struct radeon_device *rdev); } dpm; /* pageflipping */ struct { @@ -2245,6 +2244,7 @@ int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); +int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); /* VRAM scratch page for HDP bug, default vram page */ struct r600_vram_scratch { @@ -2832,6 +2832,12 @@ extern void radeon_program_register_sequence(struct radeon_device *rdev, const u32 array_size); struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev); +/* KMS */ + +u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc); +int radeon_enable_vblank_kms(struct drm_crtc *crtc); +void radeon_disable_vblank_kms(struct drm_crtc *crtc); + /* * vm */ diff --git a/drivers/gpu/drm/radeon/radeon_acpi.c b/drivers/gpu/drm/radeon/radeon_acpi.c index 6cf1645e7a1a..1baef7b493de 100644 --- a/drivers/gpu/drm/radeon/radeon_acpi.c +++ b/drivers/gpu/drm/radeon/radeon_acpi.c @@ -36,6 +36,7 @@ #include "atom.h" #include "radeon.h" #include "radeon_acpi.h" +#include "radeon_pm.h" #if defined(CONFIG_VGA_SWITCHEROO) bool radeon_atpx_dgpu_req_power_for_displays(void); @@ -45,8 +46,6 @@ static inline bool radeon_atpx_dgpu_req_power_for_displays(void) { return false; #define ACPI_AC_CLASS "ac_adapter" -extern void radeon_pm_acpi_event_handler(struct radeon_device *rdev); - struct atif_verify_interface { u16 size; /* structure size in bytes (includes size field) */ u16 version; /* version */ diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 495700d16fc9..8becbe09af2f 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -1513,6 +1513,7 @@ static struct radeon_asic sumo_asic = { .force_performance_level = &sumo_dpm_force_performance_level, .get_current_sclk = &sumo_dpm_get_current_sclk, .get_current_mclk = &sumo_dpm_get_current_mclk, + .get_current_vddc = &sumo_dpm_get_current_vddc, }, .pflip = { .page_flip = &evergreen_page_flip, diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index a74fa18cd27b..24644daead53 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h @@ -596,6 +596,7 @@ int sumo_dpm_force_performance_level(struct radeon_device *rdev, enum radeon_dpm_forced_level level); u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev); u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev); +u16 sumo_dpm_get_current_vddc(struct radeon_device *rdev); /* * cayman diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 5d2591725189..be96d9b64e43 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c @@ -34,15 +34,8 @@ #include "atom.h" #include "atom-bits.h" #include "radeon_asic.h" - -extern void -radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, - uint32_t supported_device, u16 caps); - -/* from radeon_legacy_encoder.c */ -extern void -radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, - uint32_t supported_device); +#include "radeon_atombios.h" +#include "radeon_legacy_encoders.h" union atom_supported_devices { struct _ATOM_SUPPORTED_DEVICES_INFO info; diff --git a/drivers/gpu/drm/radeon/radeon_atombios.h b/drivers/gpu/drm/radeon/radeon_atombios.h new file mode 100644 index 000000000000..fd03755e6fa2 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_atombios.h @@ -0,0 +1,45 @@ +/* radeon_atombios.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2007-8 Advanced Micro Devices, Inc. + * Copyright 2008 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie + * Alex Deucher + */ + +#ifndef __RADEON_ATOMBIOS_H__ +#define __RADEON_ATOMBIOS_H__ + +struct drm_connector; +struct drm_device; +struct drm_display_mode; +struct radeon_device; +struct radeon_encoder; + +bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, + struct drm_display_mode *mode); +void radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device, u16 caps); +void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, + struct drm_connector *drm_connector); + + +#endif /* __RADEON_ATOMBIOS_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c index 8c63ccb8b623..7c5e80d03fc9 100644 --- a/drivers/gpu/drm/radeon/radeon_audio.c +++ b/drivers/gpu/drm/radeon/radeon_audio.c @@ -25,83 +25,21 @@ #include <linux/gcd.h> #include <drm/drm_crtc.h> +#include "dce6_afmt.h" +#include "evergreen_hdmi.h" #include "radeon.h" #include "atom.h" +#include "r600.h" #include "radeon_audio.h" -void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, - u8 enable_mask); -void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, - u8 enable_mask); void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, u8 enable_mask); -u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); -void dce6_endpoint_wreg(struct radeon_device *rdev, - u32 offset, u32 reg, u32 v); -void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, - struct cea_sad *sads, int sad_count); -void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, - u8 *sadb, int sad_count); -void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, - struct drm_connector *connector, struct drm_display_mode *mode); -void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, - struct drm_connector *connector, struct drm_display_mode *mode); struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); -void dce6_afmt_select_pin(struct drm_encoder *encoder); -void r600_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce3_2_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce4_dp_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void dce6_dp_audio_set_dto(struct radeon_device *rdev, - struct radeon_crtc *crtc, unsigned int clock); -void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, - unsigned char *buffer, size_t size); -void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, - unsigned char *buffer, size_t size); -void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, - const struct radeon_hdmi_acr *acr); -void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); -void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); -void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, - u32 offset, int bpc); -void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); -void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); -void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); -void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode); static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode); -void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); -void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); -void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); static const u32 pin_offsets[7] = { diff --git a/drivers/gpu/drm/radeon/radeon_audio.h b/drivers/gpu/drm/radeon/radeon_audio.h index 5c70cceaa4a6..05e67867469b 100644 --- a/drivers/gpu/drm/radeon/radeon_audio.h +++ b/drivers/gpu/drm/radeon/radeon_audio.h @@ -81,4 +81,16 @@ void radeon_audio_mode_set(struct drm_encoder *encoder, void radeon_audio_dpms(struct drm_encoder *encoder, int mode); unsigned int radeon_audio_decode_dfs_div(unsigned int div); +void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, + struct cea_sad *sads, int sad_count); +void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, + u8 *sadb, int sad_count); +void dce3_2_audio_set_dto(struct radeon_device *rdev, + struct radeon_crtc *crtc, unsigned int clock); +void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, + const struct radeon_hdmi_acr *acr); +void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); +void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); #endif diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index d3c04df7e75d..ff2135059c07 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c @@ -31,6 +31,7 @@ #include <drm/radeon_drm.h> #include "radeon.h" +#include "radeon_legacy_encoders.h" #include "atom.h" #ifdef CONFIG_PPC_PMAC @@ -40,11 +41,6 @@ #include <asm/prom.h> #endif /* CONFIG_PPC_PMAC */ -/* from radeon_legacy_encoder.c */ -extern void -radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, - uint32_t supported_device); - /* old legacy ATI BIOS routines */ /* COMBIOS table offsets */ diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index e30834434442..607ad5620bd9 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c @@ -2571,13 +2571,11 @@ void radeon_setup_mst_connector(struct drm_device *dev) return; list_for_each_entry(connector, &dev->mode_config.connector_list, head) { - int ret; - radeon_connector = to_radeon_connector(connector); if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) continue; - ret = radeon_dp_mst_init(radeon_connector); + radeon_dp_mst_init(radeon_connector); } } diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 21ce2f9502c0..c6262fce7440 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c @@ -408,6 +408,7 @@ static int cmp_size_smaller_first(void *priv, struct list_head *a, * cs_parser_fini() - clean parser states * @parser: parser structure holding parsing context. * @error: error number + * @backoff: indicator to backoff the reservation * * If error is set than unvalidate buffer, otherwise just free memory * used by parsing context. @@ -723,8 +724,9 @@ out: /** * radeon_cs_packet_parse() - parse cp packet and point ib index to next packet - * @parser: parser structure holding parsing context. + * @p: parser structure holding parsing context. * @pkt: where to store packet information + * @idx: packet index * * Assume that chunk_ib_index is properly set. Will return -EINVAL * if packet is bigger than remaining ib size. or if packets is unknown. @@ -829,11 +831,9 @@ void radeon_cs_dump_packet(struct radeon_cs_parser *p, /** * radeon_cs_packet_next_reloc() - parse next (should be reloc) packet - * @parser: parser structure holding parsing context. - * @data: pointer to relocation data - * @offset_start: starting offset - * @offset_mask: offset mask (to align start offset on) - * @reloc: reloc informations + * @p: parser structure holding parsing context. + * @cs_reloc: reloc informations + * @nomm: no memory management for debugging * * Check if next packet is relocation packet3, do bo validation and compute * GPU offset using the provided start. diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 266e3cbbd09b..ebccaa5b2d0e 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -42,6 +42,7 @@ #include <drm/drm_probe_helper.h> #include <drm/radeon_drm.h> +#include "radeon_device.h" #include "radeon_reg.h" #include "radeon.h" #include "atom.h" @@ -544,21 +545,21 @@ int radeon_wb_init(struct radeon_device *rdev) * Note: GTT start, end, size should be initialized before calling this * function on AGP platform. * - * Note: We don't explicitly enforce VRAM start to be aligned on VRAM size, + * Note 1: We don't explicitly enforce VRAM start to be aligned on VRAM size, * this shouldn't be a problem as we are using the PCI aperture as a reference. * Otherwise this would be needed for rv280, all r3xx, and all r4xx, but * not IGP. * - * Note: we use mc_vram_size as on some board we need to program the mc to + * Note 2: we use mc_vram_size as on some board we need to program the mc to * cover the whole aperture even if VRAM size is inferior to aperture size * Novell bug 204882 + along with lots of ubuntu ones * - * Note: when limiting vram it's safe to overwritte real_vram_size because + * Note 3: when limiting vram it's safe to overwritte real_vram_size because * we are not in case where real_vram_size is inferior to mc_vram_size (ie * note afected by bogus hw of Novell bug 204882 + along with lots of ubuntu * ones) * - * Note: IGP TOM addr should be the same as the aperture addr, we don't + * Note 4: IGP TOM addr should be the same as the aperture addr, we don't * explicitly check for that thought. * * FIXME: when reducing VRAM size align new size on power of 2. @@ -627,7 +628,7 @@ void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) * GPU helpers function. */ -/** +/* * radeon_device_is_virtual - check if we are running is a virtual environment * * Check if the asic has been passed through to a VM (all asics). @@ -784,9 +785,9 @@ int radeon_dummy_page_init(struct radeon_device *rdev) rdev->dummy_page.page = alloc_page(GFP_DMA32 | GFP_KERNEL | __GFP_ZERO); if (rdev->dummy_page.page == NULL) return -ENOMEM; - rdev->dummy_page.addr = pci_map_page(rdev->pdev, rdev->dummy_page.page, + rdev->dummy_page.addr = dma_map_page(&rdev->pdev->dev, rdev->dummy_page.page, 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(rdev->pdev, rdev->dummy_page.addr)) { + if (dma_mapping_error(&rdev->pdev->dev, rdev->dummy_page.addr)) { dev_err(&rdev->pdev->dev, "Failed to DMA MAP the dummy page\n"); __free_page(rdev->dummy_page.page); rdev->dummy_page.page = NULL; @@ -1100,7 +1101,7 @@ static bool radeon_check_pot_argument(int arg) /** * Determine a sensible default GART size according to ASIC family. * - * @family ASIC family name + * @family: ASIC family name */ static int radeon_gart_size_auto(enum radeon_family family) { @@ -1276,7 +1277,7 @@ static const struct vga_switcheroo_client_ops radeon_switcheroo_ops = { * radeon_device_init - initialize the driver * * @rdev: radeon_device pointer - * @pdev: drm dev pointer + * @ddev: drm dev pointer * @pdev: pci dev pointer * @flags: driver flags * @@ -1550,12 +1551,9 @@ void radeon_device_fini(struct radeon_device *rdev) /* * Suspend & resume. */ -/** +/* * radeon_suspend_kms - initiate device suspend * - * @pdev: drm dev pointer - * @state: suspend state - * * Puts the hw in the suspend state (all asics). * Returns 0 for success or an error on failure. * Called at driver suspend. @@ -1656,11 +1654,9 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, return 0; } -/** +/* * radeon_resume_kms - initiate device resume * - * @pdev: drm dev pointer - * * Bring the hw back to operating state (all asics). * Returns 0 for success or an error on failure. * Called at driver resume. diff --git a/drivers/gpu/drm/radeon/radeon_device.h b/drivers/gpu/drm/radeon/radeon_device.h new file mode 100644 index 000000000000..31a0ae295cc8 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_device.h @@ -0,0 +1,32 @@ +/* radeon_device.h -- Private header for radeon device -*- linux-c -*- + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __RADEON_DEVICE_H__ +#define __RADEON_DEVICE_H__ + +bool radeon_device_is_virtual(void); + +#endif /* __RADEON_DEVICE_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index e0ae911ef427..3a6fedad002d 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -44,10 +44,7 @@ #include "atom.h" #include "radeon.h" - -u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc); -int radeon_enable_vblank_kms(struct drm_crtc *crtc); -void radeon_disable_vblank_kms(struct drm_crtc *crtc); +#include "radeon_kms.h" static void avivo_crtc_load_lut(struct drm_crtc *crtc) { @@ -260,7 +257,7 @@ static void radeon_crtc_destroy(struct drm_crtc *crtc) /** * radeon_unpin_work_func - unpin old buffer object * - * @__work - kernel work item + * @__work: kernel work item * * Unpin the old frame buffer object outside of the interrupt handler */ @@ -273,10 +270,7 @@ static void radeon_unpin_work_func(struct work_struct *__work) /* unpin of the old buffer */ r = radeon_bo_reserve(work->old_rbo, false); if (likely(r == 0)) { - r = radeon_bo_unpin(work->old_rbo); - if (unlikely(r != 0)) { - DRM_ERROR("failed to unpin buffer after flip\n"); - } + radeon_bo_unpin(work->old_rbo); radeon_bo_unreserve(work->old_rbo); } else DRM_ERROR("failed to reserve buffer after flip\n"); @@ -405,7 +399,7 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) /** * radeon_flip_work_func - page flip framebuffer * - * @work - kernel work item + * @__work: kernel work item * * Wait for the buffer object to become idle and do the actual page flip */ @@ -607,9 +601,7 @@ pflip_cleanup: DRM_ERROR("failed to reserve new rbo in error path\n"); goto cleanup; } - if (unlikely(radeon_bo_unpin(new_rbo) != 0)) { - DRM_ERROR("failed to unpin new rbo in error path\n"); - } + radeon_bo_unpin(new_rbo); radeon_bo_unreserve(new_rbo); cleanup: @@ -946,11 +938,12 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, * radeon_compute_pll_avivo - compute PLL paramaters * * @pll: information about the PLL + * @freq: target frequency * @dot_clock_p: resulting pixel clock - * fb_div_p: resulting feedback divider - * frac_fb_div_p: fractional part of the feedback divider - * ref_div_p: resulting reference divider - * post_div_p: resulting reference divider + * @fb_div_p: resulting feedback divider + * @frac_fb_div_p: fractional part of the feedback divider + * @ref_div_p: resulting reference divider + * @post_div_p: resulting reference divider * * Try to calculate the PLL parameters to generate the given frequency: * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div) @@ -1100,11 +1093,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, /* pre-avivo */ static inline uint32_t radeon_div(uint64_t n, uint32_t d) { - uint64_t mod; - n += d / 2; - mod = do_div(n, d); + do_div(n, d); return n; } diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c index 008308780443..2c32186c4acd 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c @@ -363,7 +363,7 @@ radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) struct radeon_connector *radeon_connector; struct drm_crtc *crtc; struct radeon_crtc *radeon_crtc; - int ret, slots; + int slots; s64 fixed_pbn, fixed_pbn_per_slot, avg_time_slots_per_mtp; if (!ASIC_IS_DCE5(rdev)) { DRM_ERROR("got mst dpms on non-DCE5\n"); @@ -418,10 +418,10 @@ radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) slots = drm_dp_find_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->pbn); - ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr, - radeon_connector->port, - mst_enc->pbn, slots); - ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); + drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr, + radeon_connector->port, + mst_enc->pbn, slots); + drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); radeon_dp_mst_set_be_cntl(primary, mst_enc, radeon_connector->mst_port->hpd.hpd, true); @@ -436,9 +436,9 @@ radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0, mst_enc->fe); - ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); + drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); - ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); + drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr); break; case DRM_MODE_DPMS_STANDBY: @@ -450,7 +450,7 @@ radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode) return; drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port); - ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); + drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr); drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr); /* and this can also fail */ diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 4cd30613fa1d..e45d7344ac2b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -1,4 +1,4 @@ -/** +/* * \file radeon_drv.c * ATI Radeon driver * @@ -51,6 +51,11 @@ #include <drm/radeon_drm.h> #include "radeon_drv.h" +#include "radeon.h" +#include "radeon_kms.h" +#include "radeon_ttm.h" +#include "radeon_device.h" +#include "radeon_prime.h" /* * KMS wrapper. @@ -111,48 +116,20 @@ #define KMS_DRIVER_MAJOR 2 #define KMS_DRIVER_MINOR 50 #define KMS_DRIVER_PATCHLEVEL 0 -int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); -void radeon_driver_unload_kms(struct drm_device *dev); -void radeon_driver_lastclose_kms(struct drm_device *dev); -int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); -void radeon_driver_postclose_kms(struct drm_device *dev, - struct drm_file *file_priv); int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon, bool freeze); int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); -void radeon_driver_irq_preinstall_kms(struct drm_device *dev); -int radeon_driver_irq_postinstall_kms(struct drm_device *dev); -void radeon_driver_irq_uninstall_kms(struct drm_device *dev); -irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); -void radeon_gem_object_free(struct drm_gem_object *obj); -int radeon_gem_object_open(struct drm_gem_object *obj, - struct drm_file *file_priv); -void radeon_gem_object_close(struct drm_gem_object *obj, - struct drm_file *file_priv); -struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj, - int flags); extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, unsigned int flags, int *vpos, int *hpos, ktime_t *stime, ktime_t *etime, const struct drm_display_mode *mode); extern bool radeon_is_px(struct drm_device *dev); -extern const struct drm_ioctl_desc radeon_ioctls_kms[]; -extern int radeon_max_kms_ioctl; -int radeon_mmap(struct file *filp, struct vm_area_struct *vma); int radeon_mode_dumb_mmap(struct drm_file *filp, struct drm_device *dev, uint32_t handle, uint64_t *offset_p); int radeon_mode_dumb_create(struct drm_file *file_priv, struct drm_device *dev, struct drm_mode_create_dumb *args); -struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); -struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, - struct dma_buf_attachment *, - struct sg_table *sg); -int radeon_gem_prime_pin(struct drm_gem_object *obj); -void radeon_gem_prime_unpin(struct drm_gem_object *obj); -void *radeon_gem_prime_vmap(struct drm_gem_object *obj); -void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); /* atpx handler */ #if defined(CONFIG_VGA_SWITCHEROO) @@ -310,9 +287,7 @@ static struct pci_device_id pciidlist[] = { MODULE_DEVICE_TABLE(pci, pciidlist); -static struct drm_driver kms_driver; - -bool radeon_device_is_virtual(void); +static const struct drm_driver kms_driver; static int radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) @@ -464,7 +439,6 @@ static int radeon_pmops_runtime_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); struct drm_device *drm_dev = pci_get_drvdata(pdev); - int ret; if (!radeon_is_px(drm_dev)) { pm_runtime_forbid(dev); @@ -474,7 +448,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev) drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; drm_kms_helper_poll_disable(drm_dev); - ret = radeon_suspend_kms(drm_dev, false, false, false); + radeon_suspend_kms(drm_dev, false, false, false); pci_save_state(pdev); pci_disable_device(pdev); pci_ignore_hotplug(pdev); @@ -550,7 +524,7 @@ long radeon_drm_ioctl(struct file *filp, } ret = drm_ioctl(filp, cmd, arg); - + pm_runtime_mark_last_busy(dev->dev); pm_runtime_put_autosuspend(dev->dev); return ret; @@ -596,9 +570,55 @@ static const struct file_operations radeon_driver_kms_fops = { #endif }; -static struct drm_driver kms_driver = { +static const struct drm_ioctl_desc radeon_ioctls_kms[] = { + DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_CP_START, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_RESET, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_SWAP, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_CLEAR, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_VERTEX, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_INDICES, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_FLIP, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_ALLOC, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_FREE, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, drm_invalid_op, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, drm_invalid_op, DRM_AUTH), + /* KMS */ + DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH), + DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_OP, radeon_gem_op_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(RADEON_GEM_USERPTR, radeon_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), +}; + +static const struct drm_driver kms_driver = { .driver_features = - DRIVER_GEM | DRIVER_RENDER, + DRIVER_GEM | DRIVER_RENDER | DRIVER_MODESET, .load = radeon_driver_load_kms, .open = radeon_driver_open_kms, .postclose = radeon_driver_postclose_kms, @@ -609,22 +629,14 @@ static struct drm_driver kms_driver = { .irq_uninstall = radeon_driver_irq_uninstall_kms, .irq_handler = radeon_driver_irq_handler_kms, .ioctls = radeon_ioctls_kms, - .gem_free_object_unlocked = radeon_gem_object_free, - .gem_open_object = radeon_gem_object_open, - .gem_close_object = radeon_gem_object_close, + .num_ioctls = ARRAY_SIZE(radeon_ioctls_kms), .dumb_create = radeon_mode_dumb_create, .dumb_map_offset = radeon_mode_dumb_mmap, .fops = &radeon_driver_kms_fops, .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, - .gem_prime_export = radeon_gem_prime_export, - .gem_prime_pin = radeon_gem_prime_pin, - .gem_prime_unpin = radeon_gem_prime_unpin, - .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, - .gem_prime_vmap = radeon_gem_prime_vmap, - .gem_prime_vunmap = radeon_gem_prime_vunmap, .name = DRIVER_NAME, .desc = DRIVER_DESC, @@ -634,9 +646,6 @@ static struct drm_driver kms_driver = { .patchlevel = KMS_DRIVER_PATCHLEVEL, }; -static struct drm_driver *driver; -static struct pci_driver *pdriver; - static struct pci_driver radeon_kms_pci_driver = { .name = DRIVER_NAME, .id_table = pciidlist, @@ -646,41 +655,33 @@ static struct pci_driver radeon_kms_pci_driver = { .driver.pm = &radeon_pm_ops, }; -static int __init radeon_init(void) +static int __init radeon_module_init(void) { if (vgacon_text_force() && radeon_modeset == -1) { DRM_INFO("VGACON disable radeon kernel modesetting.\n"); radeon_modeset = 0; } - /* set to modesetting by default if not nomodeset */ - if (radeon_modeset == -1) - radeon_modeset = 1; - - if (radeon_modeset == 1) { - DRM_INFO("radeon kernel modesetting enabled.\n"); - driver = &kms_driver; - pdriver = &radeon_kms_pci_driver; - driver->driver_features |= DRIVER_MODESET; - driver->num_ioctls = radeon_max_kms_ioctl; - radeon_register_atpx_handler(); - - } else { + + if (radeon_modeset == 0) { DRM_ERROR("No UMS support in radeon module!\n"); return -EINVAL; } - return pci_register_driver(pdriver); + DRM_INFO("radeon kernel modesetting enabled.\n"); + radeon_register_atpx_handler(); + + return pci_register_driver(&radeon_kms_pci_driver); } -static void __exit radeon_exit(void) +static void __exit radeon_module_exit(void) { - pci_unregister_driver(pdriver); + pci_unregister_driver(&radeon_kms_pci_driver); radeon_unregister_atpx_handler(); mmu_notifier_synchronize(); } -module_init(radeon_init); -module_exit(radeon_exit); +module_init(radeon_module_init); +module_exit(radeon_module_exit); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 173deb463414..ac7970919c4d 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h @@ -118,4 +118,11 @@ long radeon_drm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); +int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); +void radeon_driver_unload_kms(struct drm_device *dev); +void radeon_driver_lastclose_kms(struct drm_device *dev); +int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); +void radeon_driver_postclose_kms(struct drm_device *dev, + struct drm_file *file_priv); + #endif /* __RADEON_DRV_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index ced022fae19d..46549d5179ee 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c @@ -31,16 +31,10 @@ #include <drm/radeon_drm.h> #include "radeon.h" +#include "radeon_atombios.h" +#include "radeon_legacy_encoders.h" #include "atom.h" -extern void -radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, - struct drm_connector *drm_connector); -extern void -radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, - struct drm_connector *drm_connector); - - static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) { struct drm_device *dev = encoder->dev; diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 8735bf2bb8b5..9ee6e599ef83 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -157,7 +157,7 @@ int radeon_fence_emit(struct radeon_device *rdev, return 0; } -/** +/* * radeon_fence_check_signaled - callback from fence_queue * * this function is called with fence_queue lock held, which is also used @@ -383,7 +383,7 @@ static bool radeon_fence_is_signaled(struct dma_fence *f) /** * radeon_fence_enable_signaling - enable signalling on fence - * @fence: fence + * @f: fence * * This function is called with fence_queue lock held, and adds a callback * to fence_queue that checks if this fence is signaled, and if so it @@ -1001,7 +1001,7 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data) return 0; } -/** +/* * radeon_debugfs_gpu_reset - manually trigger a gpu reset * * Manually trigger a gpu reset at the next fence wait. diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c index e5c4271e64ed..b6b21d2e7262 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c @@ -31,11 +31,21 @@ #include <drm/drm_debugfs.h> #include <drm/drm_device.h> #include <drm/drm_file.h> +#include <drm/drm_gem_ttm_helper.h> #include <drm/radeon_drm.h> #include "radeon.h" +#include "radeon_prime.h" -void radeon_gem_object_free(struct drm_gem_object *gobj) +struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj, + int flags); +struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); +int radeon_gem_prime_pin(struct drm_gem_object *obj); +void radeon_gem_prime_unpin(struct drm_gem_object *obj); + +static const struct drm_gem_object_funcs radeon_gem_object_funcs; + +static void radeon_gem_object_free(struct drm_gem_object *gobj) { struct radeon_bo *robj = gem_to_radeon_bo(gobj); @@ -85,6 +95,7 @@ retry: return r; } *obj = &robj->tbo.base; + (*obj)->funcs = &radeon_gem_object_funcs; robj->pid = task_pid_nr(current); mutex_lock(&rdev->gem.mutex); @@ -146,7 +157,7 @@ void radeon_gem_fini(struct radeon_device *rdev) * Call from drm_gem_handle_create which appear in both new and open ioctl * case. */ -int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv) +static int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv) { struct radeon_bo *rbo = gem_to_radeon_bo(obj); struct radeon_device *rdev = rbo->rdev; @@ -176,8 +187,8 @@ int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_pri return 0; } -void radeon_gem_object_close(struct drm_gem_object *obj, - struct drm_file *file_priv) +static void radeon_gem_object_close(struct drm_gem_object *obj, + struct drm_file *file_priv) { struct radeon_bo *rbo = gem_to_radeon_bo(obj); struct radeon_device *rdev = rbo->rdev; @@ -216,6 +227,18 @@ static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r) return r; } +static const struct drm_gem_object_funcs radeon_gem_object_funcs = { + .free = radeon_gem_object_free, + .open = radeon_gem_object_open, + .close = radeon_gem_object_close, + .export = radeon_gem_prime_export, + .pin = radeon_gem_prime_pin, + .unpin = radeon_gem_prime_unpin, + .get_sg_table = radeon_gem_prime_get_sg_table, + .vmap = drm_gem_ttm_vmap, + .vunmap = drm_gem_ttm_vunmap, +}; + /* * GEM ioctls. */ diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 545e31e6cc3a..e543d993f73e 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -34,14 +34,6 @@ #include "radeon.h" #include "atom.h" -extern int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, - struct i2c_msg *msgs, int num); -extern u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap); - -/** - * radeon_ddc_probe - * - */ bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux) { u8 out = 0x0; diff --git a/drivers/gpu/drm/radeon/radeon_ib.c b/drivers/gpu/drm/radeon/radeon_ib.c index 9fd55e9c616b..c1fca2ba443c 100644 --- a/drivers/gpu/drm/radeon/radeon_ib.c +++ b/drivers/gpu/drm/radeon/radeon_ib.c @@ -48,6 +48,7 @@ static int radeon_debugfs_sa_init(struct radeon_device *rdev); * * @rdev: radeon_device pointer * @ring: ring index the IB is associated with + * @vm: requested vm * @ib: IB object returned * @size: requested IB size * diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index b86bc88ad430..b8b7f627f0a9 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c @@ -38,16 +38,15 @@ #include "atom.h" #include "radeon.h" +#include "radeon_kms.h" #include "radeon_reg.h" #define RADEON_WAIT_IDLE_TIMEOUT 200 -/** +/* * radeon_driver_irq_handler_kms - irq handler for KMS * - * @int irq, void *arg: args - * * This is the irq handler for the radeon KMS driver (all asics). * radeon_irq_process is a macro that points to the per-asic * irq handler callback. @@ -549,14 +548,14 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) } /** - * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers + * radeon_irq_kms_set_irq_n_enabled - helper for updating interrupt enable registers * * @rdev: radeon device pointer * @reg: the register to write to enable/disable interrupts * @mask: the mask that enables the interrupts * @enable: whether to enable or disable the interrupt register * @name: the name of the interrupt register to print to the kernel log - * @num: the number of the interrupt register to print to the kernel log + * @n: the number of the interrupt register to print to the kernel log * * Helper for updating the enable state of interrupt registers. Checks whether * or not the interrupt matches the enable state we want. If it doesn't, then diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 99ee60f8b604..50cee4880bb4 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -40,6 +40,8 @@ #include "radeon.h" #include "radeon_asic.h" +#include "radeon_drv.h" +#include "radeon_kms.h" #if defined(CONFIG_VGA_SWITCHEROO) bool radeon_has_atpx(void); @@ -212,7 +214,7 @@ static void radeon_set_filp_rights(struct drm_device *dev, /** * radeon_info_ioctl - answer a device specific request. * - * @rdev: radeon device pointer + * @dev: drm device pointer * @data: request object * @filp: drm filp * @@ -221,7 +223,7 @@ static void radeon_set_filp_rights(struct drm_device *dev, * etc. (all asics). * Returns 0 on success, -EINVAL on failure. */ -static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) +int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { struct radeon_device *rdev = dev->dev_private; struct drm_radeon_info *info = data; @@ -866,50 +868,3 @@ void radeon_disable_vblank_kms(struct drm_crtc *crtc) radeon_irq_set(rdev); spin_unlock_irqrestore(&rdev->irq.lock, irqflags); } - -const struct drm_ioctl_desc radeon_ioctls_kms[] = { - DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_CP_START, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_RESET, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_SWAP, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_CLEAR, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_VERTEX, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_INDICES, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_FLIP, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_ALLOC, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_FREE, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, drm_invalid_op, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, drm_invalid_op, DRM_AUTH), - /* KMS */ - DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_OP, radeon_gem_op_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_USERPTR, radeon_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), -}; -int radeon_max_kms_ioctl = ARRAY_SIZE(radeon_ioctls_kms); diff --git a/drivers/gpu/drm/radeon/radeon_kms.h b/drivers/gpu/drm/radeon/radeon_kms.h new file mode 100644 index 000000000000..9b97bf38acd4 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_kms.h @@ -0,0 +1,39 @@ +/* radeon_kms.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_KMS_H__ +#define __RADEON_KMS_H__ + +u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc); +int radeon_enable_vblank_kms(struct drm_crtc *crtc); +void radeon_disable_vblank_kms(struct drm_crtc *crtc); +irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); +void radeon_driver_irq_preinstall_kms(struct drm_device *dev); +int radeon_driver_irq_postinstall_kms(struct drm_device *dev); +void radeon_driver_irq_uninstall_kms(struct drm_device *dev); + +#endif /* __RADEON_KMS_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 44d060f75318..e64fd0ce6707 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c @@ -35,6 +35,7 @@ #include "radeon.h" #include "radeon_asic.h" +#include "radeon_legacy_encoders.h" #include "atom.h" #ifdef CONFIG_PMAC_BACKLIGHT #include <asm/backlight.h> diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.h b/drivers/gpu/drm/radeon/radeon_legacy_encoders.h new file mode 100644 index 000000000000..f4c7432267e6 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.h @@ -0,0 +1,36 @@ +/* radeon_legacy_encoders.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_LEGACY_ENCODERS_H__ +#define __RADEON_LEGACY_ENCODERS_H__ + +void radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, + struct drm_connector *drm_connector); +void radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, + uint32_t supported_device); + +#endif /* __RADEON_LEGACY_ENCODERS_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_mn.c b/drivers/gpu/drm/radeon/radeon_mn.c index 97b9b6dd6dd3..e37c9a57a7c3 100644 --- a/drivers/gpu/drm/radeon/radeon_mn.c +++ b/drivers/gpu/drm/radeon/radeon_mn.c @@ -41,6 +41,7 @@ * * @mn: our notifier * @range: the VMA under invalidation + * @cur_seq: Value to pass to mmu_interval_set_seq() * * We block for all BOs between start and end to be idle and * unmap them by move them into system domain again. diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 316e35d3f8a9..8bc5ad1d6585 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -40,9 +40,8 @@ #include "radeon.h" #include "radeon_trace.h" +#include "radeon_ttm.h" -int radeon_ttm_init(struct radeon_device *rdev); -void radeon_ttm_fini(struct radeon_device *rdev); static void radeon_bo_clear_surface_reg(struct radeon_bo *bo); /* @@ -113,57 +112,29 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) rbo->placements[c].fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; rbo->placements[c].mem_type = TTM_PL_VRAM; - rbo->placements[c++].flags = TTM_PL_FLAG_WC | - TTM_PL_FLAG_UNCACHED; + rbo->placements[c++].flags = 0; } rbo->placements[c].fpfn = 0; rbo->placements[c].mem_type = TTM_PL_VRAM; - rbo->placements[c++].flags = TTM_PL_FLAG_WC | - TTM_PL_FLAG_UNCACHED; + rbo->placements[c++].flags = 0; } if (domain & RADEON_GEM_DOMAIN_GTT) { - if (rbo->flags & RADEON_GEM_GTT_UC) { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_TT; - rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED; - - } else if ((rbo->flags & RADEON_GEM_GTT_WC) || - (rbo->rdev->flags & RADEON_IS_AGP)) { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_TT; - rbo->placements[c++].flags = TTM_PL_FLAG_WC | - TTM_PL_FLAG_UNCACHED; - } else { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_TT; - rbo->placements[c++].flags = TTM_PL_FLAG_CACHED; - } + rbo->placements[c].fpfn = 0; + rbo->placements[c].mem_type = TTM_PL_TT; + rbo->placements[c++].flags = 0; } if (domain & RADEON_GEM_DOMAIN_CPU) { - if (rbo->flags & RADEON_GEM_GTT_UC) { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_SYSTEM; - rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED; - - } else if ((rbo->flags & RADEON_GEM_GTT_WC) || - rbo->rdev->flags & RADEON_IS_AGP) { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_SYSTEM; - rbo->placements[c++].flags = TTM_PL_FLAG_WC | - TTM_PL_FLAG_UNCACHED; - } else { - rbo->placements[c].fpfn = 0; - rbo->placements[c].mem_type = TTM_PL_SYSTEM; - rbo->placements[c++].flags = TTM_PL_FLAG_CACHED; - } + rbo->placements[c].fpfn = 0; + rbo->placements[c].mem_type = TTM_PL_SYSTEM; + rbo->placements[c++].flags = 0; } if (!c) { rbo->placements[c].fpfn = 0; rbo->placements[c].mem_type = TTM_PL_SYSTEM; - rbo->placements[c++].flags = TTM_PL_MASK_CACHING; + rbo->placements[c++].flags = 0; } rbo->placement.num_placement = c; @@ -334,8 +305,8 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm)) return -EPERM; - if (bo->pin_count) { - bo->pin_count++; + if (bo->tbo.pin_count) { + ttm_bo_pin(&bo->tbo); if (gpu_addr) *gpu_addr = radeon_bo_gpu_offset(bo); @@ -367,13 +338,11 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; else bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; - - bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT; } r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); if (likely(r == 0)) { - bo->pin_count = 1; + ttm_bo_pin(&bo->tbo); if (gpu_addr != NULL) *gpu_addr = radeon_bo_gpu_offset(bo); if (domain == RADEON_GEM_DOMAIN_VRAM) @@ -391,36 +360,22 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr); } -int radeon_bo_unpin(struct radeon_bo *bo) +void radeon_bo_unpin(struct radeon_bo *bo) { - struct ttm_operation_ctx ctx = { false, false }; - int r, i; - - if (!bo->pin_count) { - dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); - return 0; - } - bo->pin_count--; - if (bo->pin_count) - return 0; - for (i = 0; i < bo->placement.num_placement; i++) { - bo->placements[i].lpfn = 0; - bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT; - } - r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); - if (likely(r == 0)) { + ttm_bo_unpin(&bo->tbo); + if (!bo->tbo.pin_count) { if (bo->tbo.mem.mem_type == TTM_PL_VRAM) bo->rdev->vram_pin_size -= radeon_bo_size(bo); else bo->rdev->gart_pin_size -= radeon_bo_size(bo); - } else { - dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); } - return r; } int radeon_bo_evict_vram(struct radeon_device *rdev) { + struct ttm_bo_device *bdev = &rdev->mman.bdev; + struct ttm_resource_manager *man; + /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */ #ifndef CONFIG_HIBERNATION if (rdev->flags & RADEON_IS_IGP) { @@ -429,7 +384,8 @@ int radeon_bo_evict_vram(struct radeon_device *rdev) return 0; } #endif - return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM); + man = ttm_manager_type(bdev, TTM_PL_VRAM); + return ttm_resource_manager_evict_all(bdev, man); } void radeon_bo_force_delete(struct radeon_device *rdev) @@ -549,7 +505,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev, list_for_each_entry(lobj, head, tv.head) { struct radeon_bo *bo = lobj->robj; - if (!bo->pin_count) { + if (!bo->tbo.pin_count) { u32 domain = lobj->preferred_domains; u32 allowed = lobj->allowed_domains; u32 current_domain = @@ -629,7 +585,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo) break; old_object = reg->bo; - if (old_object->pin_count == 0) + if (old_object->tbo.pin_count == 0) steal = i; } @@ -794,7 +750,7 @@ void radeon_bo_move_notify(struct ttm_buffer_object *bo, radeon_update_memory_usage(rbo, new_mem->mem_type, 1); } -int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) +vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) { struct ttm_operation_ctx ctx = { false, false }; struct radeon_device *rdev; @@ -816,8 +772,8 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) return 0; /* Can't move a pinned BO to visible VRAM */ - if (rbo->pin_count > 0) - return -EINVAL; + if (rbo->tbo.pin_count > 0) + return VM_FAULT_SIGBUS; /* hurrah the memory is not visible ! */ radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); @@ -831,34 +787,23 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) r = ttm_bo_validate(bo, &rbo->placement, &ctx); if (unlikely(r == -ENOMEM)) { radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); - return ttm_bo_validate(bo, &rbo->placement, &ctx); - } else if (unlikely(r != 0)) { - return r; + r = ttm_bo_validate(bo, &rbo->placement, &ctx); + } else if (likely(!r)) { + offset = bo->mem.start << PAGE_SHIFT; + /* this should never happen */ + if ((offset + size) > rdev->mc.visible_vram_size) + return VM_FAULT_SIGBUS; } - offset = bo->mem.start << PAGE_SHIFT; - /* this should never happen */ - if ((offset + size) > rdev->mc.visible_vram_size) - return -EINVAL; + if (unlikely(r == -EBUSY || r == -ERESTARTSYS)) + return VM_FAULT_NOPAGE; + else if (unlikely(r)) + return VM_FAULT_SIGBUS; + ttm_bo_move_to_lru_tail_unlocked(bo); return 0; } -int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait) -{ - int r; - - r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL); - if (unlikely(r != 0)) - return r; - if (mem_type) - *mem_type = bo->tbo.mem.mem_type; - - r = ttm_bo_wait(&bo->tbo, true, no_wait); - ttm_bo_unreserve(&bo->tbo); - return r; -} - /** * radeon_bo_fence - add fence to buffer object * diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h index 44b47241ee42..d606e9a935e3 100644 --- a/drivers/gpu/drm/radeon/radeon_object.h +++ b/drivers/gpu/drm/radeon/radeon_object.h @@ -133,9 +133,6 @@ static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo) return drm_vma_node_offset_addr(&bo->tbo.base.vma_node); } -extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, - bool no_wait); - extern int radeon_bo_create(struct radeon_device *rdev, unsigned long size, int byte_align, bool kernel, u32 domain, u32 flags, @@ -149,7 +146,7 @@ extern void radeon_bo_unref(struct radeon_bo **bo); extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr); extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, u64 *gpu_addr); -extern int radeon_bo_unpin(struct radeon_bo *bo); +extern void radeon_bo_unpin(struct radeon_bo *bo); extern int radeon_bo_evict_vram(struct radeon_device *rdev); extern void radeon_bo_force_delete(struct radeon_device *rdev); extern int radeon_bo_init(struct radeon_device *rdev); @@ -166,7 +163,7 @@ extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, extern void radeon_bo_move_notify(struct ttm_buffer_object *bo, bool evict, struct ttm_resource *new_mem); -extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); +extern vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence, bool shared); diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 05c4196a8212..1995dad59dd0 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c @@ -33,6 +33,7 @@ #include "avivod.h" #include "r600_dpm.h" #include "radeon.h" +#include "radeon_pm.h" #define RADEON_IDLE_LOOP_MS 100 #define RADEON_RECLOCK_DELAY_MS 200 @@ -737,6 +738,26 @@ static ssize_t radeon_hwmon_show_sclk(struct device *dev, static SENSOR_DEVICE_ATTR(freq1_input, S_IRUGO, radeon_hwmon_show_sclk, NULL, 0); +static ssize_t radeon_hwmon_show_vddc(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct radeon_device *rdev = dev_get_drvdata(dev); + struct drm_device *ddev = rdev->ddev; + u16 vddc = 0; + + /* Can't get vddc when the card is off */ + if ((rdev->flags & RADEON_IS_PX) && + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) + return -EINVAL; + + if (rdev->asic->dpm.get_current_vddc) + vddc = rdev->asic->dpm.get_current_vddc(rdev); + + return snprintf(buf, PAGE_SIZE, "%u\n", vddc); +} + +static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, radeon_hwmon_show_vddc, NULL, + 0); static struct attribute *hwmon_attributes[] = { &sensor_dev_attr_temp1_input.dev_attr.attr, @@ -747,6 +768,7 @@ static struct attribute *hwmon_attributes[] = { &sensor_dev_attr_pwm1_min.dev_attr.attr, &sensor_dev_attr_pwm1_max.dev_attr.attr, &sensor_dev_attr_freq1_input.dev_attr.attr, + &sensor_dev_attr_in0_input.dev_attr.attr, NULL }; @@ -765,7 +787,13 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr || attr == &sensor_dev_attr_pwm1_max.dev_attr.attr || attr == &sensor_dev_attr_pwm1_min.dev_attr.attr || - attr == &sensor_dev_attr_freq1_input.dev_attr.attr)) + attr == &sensor_dev_attr_freq1_input.dev_attr.attr || + attr == &sensor_dev_attr_in0_input.dev_attr.attr)) + return 0; + + /* Skip vddc attribute if get_current_vddc is not implemented */ + if(attr == &sensor_dev_attr_in0_input.dev_attr.attr && + !rdev->asic->dpm.get_current_vddc) return 0; /* Skip fan attributes if fan is not present */ diff --git a/drivers/gpu/drm/radeon/radeon_pm.h b/drivers/gpu/drm/radeon/radeon_pm.h new file mode 100644 index 000000000000..ebf058aff420 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_pm.h @@ -0,0 +1,29 @@ +/* radeon_pm.h -- Private header for radeon driver -*- linux-c -*- + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_PM_H__ +#define __RADEON_PM_H__ + +void radeon_pm_acpi_event_handler(struct radeon_device *rdev); + +#endif /* __RADEON_PM_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c index b9de0e51c0be..dd482edc819c 100644 --- a/drivers/gpu/drm/radeon/radeon_prime.c +++ b/drivers/gpu/drm/radeon/radeon_prime.c @@ -30,6 +30,7 @@ #include <drm/radeon_drm.h> #include "radeon.h" +#include "radeon_prime.h" struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj) { @@ -39,26 +40,6 @@ struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj) return drm_prime_pages_to_sg(obj->dev, bo->tbo.ttm->pages, npages); } -void *radeon_gem_prime_vmap(struct drm_gem_object *obj) -{ - struct radeon_bo *bo = gem_to_radeon_bo(obj); - int ret; - - ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, - &bo->dma_buf_vmap); - if (ret) - return ERR_PTR(ret); - - return bo->dma_buf_vmap.virtual; -} - -void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr) -{ - struct radeon_bo *bo = gem_to_radeon_bo(obj); - - ttm_bo_kunmap(&bo->dma_buf_vmap); -} - struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, struct dma_buf_attachment *attach, struct sg_table *sg) diff --git a/drivers/gpu/drm/radeon/radeon_prime.h b/drivers/gpu/drm/radeon/radeon_prime.h new file mode 100644 index 000000000000..25d477f5670b --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_prime.h @@ -0,0 +1,40 @@ +/* radeon_prime.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2012 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_PRIME_H__ +#define __RADEON_PRIME_H__ + +struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj, + int flags); +struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); +int radeon_gem_prime_pin(struct drm_gem_object *obj); +void radeon_gem_prime_unpin(struct drm_gem_object *obj); +void *radeon_gem_prime_vmap(struct drm_gem_object *obj); +void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); +struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, + struct dma_buf_attachment *, + struct sg_table *sg); + +#endif /* __RADEON_PRIME_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 37093cea24c5..c3304c977a0a 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c @@ -218,6 +218,7 @@ void radeon_ring_undo(struct radeon_ring *ring) /** * radeon_ring_unlock_undo - reset the wptr and unlock the ring * + * @rdev: radeon device structure * @ring: radeon_ring structure holding ring information * * Call radeon_ring_undo() then unlock the ring (all asics). @@ -231,6 +232,7 @@ void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *rin /** * radeon_ring_lockup_update - update lockup variables * + * @rdev: radeon device structure * @ring: radeon_ring structure holding ring information * * Update the last rptr value and timestamp (all asics). @@ -275,6 +277,7 @@ bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *rin * * @rdev: radeon_device pointer * @ring: the ring we want to back up + * @data: placeholder for returned commit data * * Saves all unprocessed commits from a ring, returns the number of dwords saved. */ diff --git a/drivers/gpu/drm/radeon/radeon_sync.c b/drivers/gpu/drm/radeon/radeon_sync.c index 55cc77a73c7b..5d3302945076 100644 --- a/drivers/gpu/drm/radeon/radeon_sync.c +++ b/drivers/gpu/drm/radeon/radeon_sync.c @@ -79,6 +79,7 @@ void radeon_sync_fence(struct radeon_sync *sync, /** * radeon_sync_resv - use the semaphores to sync to a reservation object * + * @rdev: radeon_device pointer * @sync: sync object to add fences from reservation object to * @resv: reservation object with embedded fence * @shared: true if we should only sync to the exclusive fence diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 36150b7f31a9..d59ef6e92a40 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -47,11 +47,11 @@ #include <drm/ttm/ttm_bo_api.h> #include <drm/ttm/ttm_bo_driver.h> #include <drm/ttm/ttm_module.h> -#include <drm/ttm/ttm_page_alloc.h> #include <drm/ttm/ttm_placement.h> #include "radeon_reg.h" #include "radeon.h" +#include "radeon_ttm.h" static int radeon_ttm_debugfs_init(struct radeon_device *rdev); static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); @@ -59,6 +59,8 @@ static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm, struct ttm_resource *bo_mem); +static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev, + struct ttm_tt *ttm); struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev) { @@ -89,7 +91,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo, .fpfn = 0, .lpfn = 0, .mem_type = TTM_PL_SYSTEM, - .flags = TTM_PL_MASK_CACHING + .flags = 0 }; struct radeon_bo *rbo; @@ -151,7 +153,7 @@ static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) } static int radeon_move_blit(struct ttm_buffer_object *bo, - bool evict, bool no_wait_gpu, + bool evict, struct ttm_resource *new_mem, struct ttm_resource *old_mem) { @@ -205,156 +207,77 @@ static int radeon_move_blit(struct ttm_buffer_object *bo, return r; } -static int radeon_move_vram_ram(struct ttm_buffer_object *bo, - bool evict, bool interruptible, - bool no_wait_gpu, - struct ttm_resource *new_mem) -{ - struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu }; - struct ttm_resource *old_mem = &bo->mem; - struct ttm_resource tmp_mem; - struct ttm_place placements; - struct ttm_placement placement; - int r; - - tmp_mem = *new_mem; - tmp_mem.mm_node = NULL; - placement.num_placement = 1; - placement.placement = &placements; - placement.num_busy_placement = 1; - placement.busy_placement = &placements; - placements.fpfn = 0; - placements.lpfn = 0; - placements.mem_type = TTM_PL_TT; - placements.flags = TTM_PL_MASK_CACHING; - r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx); - if (unlikely(r)) { - return r; - } - - r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement); - if (unlikely(r)) { - goto out_cleanup; - } - - r = ttm_tt_populate(bo->bdev, bo->ttm, &ctx); - if (unlikely(r)) { - goto out_cleanup; - } - - r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem); - if (unlikely(r)) { - goto out_cleanup; - } - r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem); - if (unlikely(r)) { - goto out_cleanup; - } - r = ttm_bo_move_ttm(bo, &ctx, new_mem); -out_cleanup: - ttm_resource_free(bo, &tmp_mem); - return r; -} - -static int radeon_move_ram_vram(struct ttm_buffer_object *bo, - bool evict, bool interruptible, - bool no_wait_gpu, - struct ttm_resource *new_mem) -{ - struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu }; - struct ttm_resource *old_mem = &bo->mem; - struct ttm_resource tmp_mem; - struct ttm_placement placement; - struct ttm_place placements; - int r; - - tmp_mem = *new_mem; - tmp_mem.mm_node = NULL; - placement.num_placement = 1; - placement.placement = &placements; - placement.num_busy_placement = 1; - placement.busy_placement = &placements; - placements.fpfn = 0; - placements.lpfn = 0; - placements.mem_type = TTM_PL_TT; - placements.flags = TTM_PL_MASK_CACHING; - r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx); - if (unlikely(r)) { - return r; - } - r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem); - if (unlikely(r)) { - goto out_cleanup; - } - r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem); - if (unlikely(r)) { - goto out_cleanup; - } -out_cleanup: - ttm_resource_free(bo, &tmp_mem); - return r; -} - static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, struct ttm_operation_ctx *ctx, - struct ttm_resource *new_mem) + struct ttm_resource *new_mem, + struct ttm_place *hop) { struct radeon_device *rdev; struct radeon_bo *rbo; struct ttm_resource *old_mem = &bo->mem; int r; - r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu); + if (new_mem->mem_type == TTM_PL_TT) { + r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); + if (r) + return r; + } + + r = ttm_bo_wait_ctx(bo, ctx); if (r) return r; /* Can't move a pinned BO */ rbo = container_of(bo, struct radeon_bo, tbo); - if (WARN_ON_ONCE(rbo->pin_count > 0)) + if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) return -EINVAL; rdev = radeon_get_rdev(bo->bdev); if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { ttm_bo_move_null(bo, new_mem); - return 0; + goto out; } - if ((old_mem->mem_type == TTM_PL_TT && - new_mem->mem_type == TTM_PL_SYSTEM) || - (old_mem->mem_type == TTM_PL_SYSTEM && - new_mem->mem_type == TTM_PL_TT)) { - /* bind is enough */ + if (old_mem->mem_type == TTM_PL_SYSTEM && + new_mem->mem_type == TTM_PL_TT) { ttm_bo_move_null(bo, new_mem); - return 0; - } - if (!rdev->ring[radeon_copy_ring_index(rdev)].ready || - rdev->asic->copy.copy == NULL) { - /* use memcpy */ - goto memcpy; + goto out; } - if (old_mem->mem_type == TTM_PL_VRAM && + if (old_mem->mem_type == TTM_PL_TT && new_mem->mem_type == TTM_PL_SYSTEM) { - r = radeon_move_vram_ram(bo, evict, ctx->interruptible, - ctx->no_wait_gpu, new_mem); - } else if (old_mem->mem_type == TTM_PL_SYSTEM && - new_mem->mem_type == TTM_PL_VRAM) { - r = radeon_move_ram_vram(bo, evict, ctx->interruptible, - ctx->no_wait_gpu, new_mem); + radeon_ttm_tt_unbind(bo->bdev, bo->ttm); + ttm_resource_free(bo, &bo->mem); + ttm_bo_assign_mem(bo, new_mem); + goto out; + } + if (rdev->ring[radeon_copy_ring_index(rdev)].ready && + rdev->asic->copy.copy != NULL) { + if ((old_mem->mem_type == TTM_PL_SYSTEM && + new_mem->mem_type == TTM_PL_VRAM) || + (old_mem->mem_type == TTM_PL_VRAM && + new_mem->mem_type == TTM_PL_SYSTEM)) { + hop->fpfn = 0; + hop->lpfn = 0; + hop->mem_type = TTM_PL_TT; + hop->flags = 0; + return -EMULTIHOP; + } + + r = radeon_move_blit(bo, evict, new_mem, old_mem); } else { - r = radeon_move_blit(bo, evict, ctx->no_wait_gpu, - new_mem, old_mem); + r = -ENODEV; } if (r) { -memcpy: r = ttm_bo_move_memcpy(bo, ctx, new_mem); - if (r) { + if (r) return r; - } } +out: /* update statistics */ atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved); + radeon_bo_move_notify(bo, evict, new_mem); return 0; } @@ -374,6 +297,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_reso mem->bus.offset = (mem->start << PAGE_SHIFT) + rdev->mc.agp_base; mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; + mem->bus.caching = ttm_write_combined; } #endif break; @@ -384,17 +308,13 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_reso return -EINVAL; mem->bus.offset += rdev->mc.aper_base; mem->bus.is_iomem = true; + mem->bus.caching = ttm_write_combined; #ifdef __alpha__ /* * Alpha: use bus.addr to hold the ioremap() return, * so we can modify bus.base below. */ - if (mem->placement & TTM_PL_FLAG_WC) - mem->bus.addr = - ioremap_wc(mem->bus.offset, bus_size); - else - mem->bus.addr = - ioremap(mem->bus.offset, bus_size); + mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); if (!mem->bus.addr) return -ENOMEM; @@ -418,7 +338,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_reso * TTM backend functions. */ struct radeon_ttm_tt { - struct ttm_dma_tt ttm; + struct ttm_tt ttm; u64 offset; uint64_t userptr; @@ -545,15 +465,15 @@ static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev, gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); if (!ttm->num_pages) { - WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", + WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", ttm->num_pages, bo_mem, ttm); } - if (ttm->caching_state == tt_cached) + if (ttm->caching == ttm_cached) flags |= RADEON_GART_PAGE_SNOOP; r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, ttm->pages, gtt->ttm.dma_address, flags); if (r) { - DRM_ERROR("failed to bind %lu pages at 0x%08X\n", + DRM_ERROR("failed to bind %u pages at 0x%08X\n", ttm->num_pages, (unsigned)gtt->offset); return r; } @@ -583,33 +503,43 @@ static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt radeon_ttm_backend_unbind(bdev, ttm); ttm_tt_destroy_common(bdev, ttm); - ttm_dma_tt_fini(>t->ttm); + ttm_tt_fini(>t->ttm); kfree(gtt); } static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { - struct radeon_device *rdev; struct radeon_ttm_tt *gtt; - - rdev = radeon_get_rdev(bo->bdev); + enum ttm_caching caching; + struct radeon_bo *rbo; #if IS_ENABLED(CONFIG_AGP) + struct radeon_device *rdev = radeon_get_rdev(bo->bdev); + if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, page_flags); } #endif + rbo = container_of(bo, struct radeon_bo, tbo); gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); if (gtt == NULL) { return NULL; } - if (ttm_dma_tt_init(>t->ttm, bo, page_flags)) { + + if (rbo->flags & RADEON_GEM_GTT_UC) + caching = ttm_uncached; + else if (rbo->flags & RADEON_GEM_GTT_WC) + caching = ttm_write_combined; + else + caching = ttm_cached; + + if (ttm_dma_tt_init(>t->ttm, bo, page_flags, caching)) { kfree(gtt); return NULL; } - return >t->ttm.ttm; + return >t->ttm; } static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, @@ -622,7 +552,7 @@ static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, if (!ttm) return NULL; - return container_of(ttm, struct radeon_ttm_tt, ttm.ttm); + return container_of(ttm, struct radeon_ttm_tt, ttm); } static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev, @@ -639,30 +569,16 @@ static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev, return -ENOMEM; ttm->page_flags |= TTM_PAGE_FLAG_SG; - ttm_tt_set_populated(ttm); return 0; } if (slave && ttm->sg) { drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, gtt->ttm.dma_address, ttm->num_pages); - ttm_tt_set_populated(ttm); return 0; } -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - return ttm_pool_populate(ttm, ctx); - } -#endif - -#ifdef CONFIG_SWIOTLB - if (rdev->need_swiotlb && swiotlb_nr_tbl()) { - return ttm_dma_populate(>t->ttm, rdev->dev, ctx); - } -#endif - - return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx); + return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); } static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm) @@ -680,21 +596,7 @@ static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt * if (slave) return; -#if IS_ENABLED(CONFIG_AGP) - if (rdev->flags & RADEON_IS_AGP) { - ttm_pool_unpopulate(ttm); - return; - } -#endif - -#ifdef CONFIG_SWIOTLB - if (rdev->need_swiotlb && swiotlb_nr_tbl()) { - ttm_dma_unpopulate(>t->ttm, rdev->dev); - return; - } -#endif - - ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm); + return ttm_pool_free(&rdev->mman.bdev.pool, ttm); } int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, @@ -793,19 +695,22 @@ bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); } +static void +radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) +{ + radeon_bo_move_notify(bo, false, NULL); +} + static struct ttm_bo_driver radeon_bo_driver = { .ttm_tt_create = &radeon_ttm_tt_create, .ttm_tt_populate = &radeon_ttm_tt_populate, .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, - .ttm_tt_bind = &radeon_ttm_tt_bind, - .ttm_tt_unbind = &radeon_ttm_tt_unbind, .ttm_tt_destroy = &radeon_ttm_tt_destroy, .eviction_valuable = ttm_bo_eviction_valuable, .evict_flags = &radeon_evict_flags, .move = &radeon_bo_move, .verify_access = &radeon_verify_access, - .move_notify = &radeon_bo_move_notify, - .fault_reserve_notify = &radeon_bo_fault_reserve_notify, + .delete_mem_notify = &radeon_bo_delete_mem_notify, .io_mem_reserve = &radeon_ttm_io_mem_reserve, }; @@ -814,10 +719,10 @@ int radeon_ttm_init(struct radeon_device *rdev) int r; /* No others user of address space so set it to 0 */ - r = ttm_bo_device_init(&rdev->mman.bdev, - &radeon_bo_driver, + r = ttm_bo_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, rdev->ddev->anon_inode->i_mapping, rdev->ddev->vma_offset_manager, + rdev->need_swiotlb, dma_addressing_limited(&rdev->pdev->dev)); if (r) { DRM_ERROR("failed initializing buffer object driver(%d).\n", r); @@ -825,6 +730,9 @@ int radeon_ttm_init(struct radeon_device *rdev) } rdev->mman.initialized = true; + ttm_pool_init(&rdev->mman.bdev.pool, rdev->dev, rdev->need_swiotlb, + dma_addressing_limited(&rdev->pdev->dev)); + r = radeon_ttm_init_vram(rdev); if (r) { DRM_ERROR("Failed initializing VRAM heap.\n"); @@ -906,17 +814,29 @@ void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf) { - struct ttm_buffer_object *bo; - struct radeon_device *rdev; + struct ttm_buffer_object *bo = vmf->vma->vm_private_data; + struct radeon_device *rdev = radeon_get_rdev(bo->bdev); vm_fault_t ret; - bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data; - if (bo == NULL) - return VM_FAULT_NOPAGE; - - rdev = radeon_get_rdev(bo->bdev); down_read(&rdev->pm.mclk_lock); - ret = ttm_bo_vm_fault(vmf); + + ret = ttm_bo_vm_reserve(bo, vmf); + if (ret) + goto unlock_mclk; + + ret = radeon_bo_fault_reserve_notify(bo); + if (ret) + goto unlock_resv; + + ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot, + TTM_BO_VM_NUM_PREFAULT, 1); + if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) + goto unlock_mclk; + +unlock_resv: + dma_resv_unlock(bo->base.resv); + +unlock_mclk: up_read(&rdev->pm.mclk_lock); return ret; } @@ -960,6 +880,14 @@ static int radeon_mm_dump_table(struct seq_file *m, void *data) return 0; } +static int radeon_ttm_pool_debugfs(struct seq_file *m, void *data) +{ + struct drm_info_node *node = (struct drm_info_node *)m->private; + struct drm_device *dev = node->minor->dev; + struct radeon_device *rdev = dev->dev_private; + + return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); +} static int ttm_pl_vram = TTM_PL_VRAM; static int ttm_pl_tt = TTM_PL_TT; @@ -967,10 +895,7 @@ static int ttm_pl_tt = TTM_PL_TT; static struct drm_info_list radeon_ttm_debugfs_list[] = { {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram}, {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt}, - {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL}, -#ifdef CONFIG_SWIOTLB - {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL} -#endif + {"ttm_page_pool", radeon_ttm_pool_debugfs, 0, NULL} }; static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) @@ -1098,11 +1023,6 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev) count = ARRAY_SIZE(radeon_ttm_debugfs_list); -#ifdef CONFIG_SWIOTLB - if (!(rdev->need_swiotlb && swiotlb_nr_tbl())) - --count; -#endif - return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); #else diff --git a/drivers/gpu/drm/radeon/radeon_ttm.h b/drivers/gpu/drm/radeon/radeon_ttm.h new file mode 100644 index 000000000000..4d7b90ee2774 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_ttm.h @@ -0,0 +1,37 @@ +/* radeon_ttm.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 2000 VA Linux Systems, Inc., Fremont, California. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_TTM_H__ +#define __RADEON_TTM_H__ + +struct radeon_device; + +int radeon_ttm_init(struct radeon_device *rdev); +void radeon_ttm_fini(struct radeon_device *rdev); +int radeon_mmap(struct file *filp, struct vm_area_struct *vma); + +#endif /* __RADEON_TTM_H__ */ diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 27b14eff532c..2dc9c9f98049 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c @@ -119,6 +119,7 @@ void radeon_vm_manager_fini(struct radeon_device *rdev) /** * radeon_vm_get_bos - add the vm BOs to a validation list * + * @rdev: radeon_device pointer * @vm: vm providing the BOs * @head: head of validation list * @@ -629,8 +630,6 @@ static uint32_t radeon_vm_page_flags(uint32_t flags) * * @rdev: radeon_device pointer * @vm: requested vm - * @start: start of GPU address range - * @end: end of GPU address range * * Allocates new page tables if necessary * and updates the page directory (cayman+). @@ -802,6 +801,7 @@ static void radeon_vm_frag_ptes(struct radeon_device *rdev, * * @rdev: radeon_device pointer * @vm: requested vm + * @ib: indirect buffer to use for the update * @start: start of GPU address range * @end: end of GPU address range * @dst: destination address to map to @@ -900,8 +900,7 @@ static void radeon_vm_fence_pts(struct radeon_vm *vm, * radeon_vm_bo_update - map a bo into the vm page table * * @rdev: radeon_device pointer - * @vm: requested vm - * @bo: radeon buffer object + * @bo_va: radeon buffer virtual address object * @mem: ttm mem * * Fill in the page table entries for @bo (cayman+). @@ -1145,7 +1144,6 @@ void radeon_vm_bo_rmv(struct radeon_device *rdev, * radeon_vm_bo_invalidate - mark the bo as invalid * * @rdev: radeon_device pointer - * @vm: requested vm * @bo: radeon buffer object * * Mark @bo as invalid (cayman+). diff --git a/drivers/gpu/drm/radeon/rv730_dpm.c b/drivers/gpu/drm/radeon/rv730_dpm.c index 84a3d6d72486..a9de5c953396 100644 --- a/drivers/gpu/drm/radeon/rv730_dpm.c +++ b/drivers/gpu/drm/radeon/rv730_dpm.c @@ -25,6 +25,7 @@ #include "radeon.h" #include "rv730d.h" #include "r600_dpm.h" +#include "rv770.h" #include "rv770_dpm.h" #include "atom.h" @@ -33,9 +34,6 @@ #define MC_CG_ARB_FREQ_F2 0x0c #define MC_CG_ARB_FREQ_F3 0x0d -struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); - int rv730_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock, RV770_SMC_SCLK_VALUE *sclk) diff --git a/drivers/gpu/drm/radeon/rv740_dpm.c b/drivers/gpu/drm/radeon/rv740_dpm.c index 327d65a76e1f..d57a3e1df8d6 100644 --- a/drivers/gpu/drm/radeon/rv740_dpm.c +++ b/drivers/gpu/drm/radeon/rv740_dpm.c @@ -25,11 +25,10 @@ #include "radeon.h" #include "rv740d.h" #include "r600_dpm.h" +#include "rv770.h" #include "rv770_dpm.h" #include "atom.h" -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); - u32 rv740_get_decoded_reference_divider(u32 encoded_ref) { u32 ref = 0; diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 21f653ae1e1b..88e29ebaad46 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -39,6 +39,7 @@ #include "radeon_asic.h" #include "radeon_audio.h" #include "rv770d.h" +#include "rv770.h" #define R700_PFP_UCODE_SIZE 848 #define R700_PM4_UCODE_SIZE 1360 diff --git a/drivers/gpu/drm/radeon/rv770.h b/drivers/gpu/drm/radeon/rv770.h new file mode 100644 index 000000000000..fdeede223ee7 --- /dev/null +++ b/drivers/gpu/drm/radeon/rv770.h @@ -0,0 +1,39 @@ +/* radeon_rv770.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2008 Advanced Micro Devices, Inc. + * Copyright 2008 Red Hat Inc. + * Copyright 2009 Jerome Glisse. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __RADEON_RV770_H__ +#define __RADEON_RV770_H__ + +struct radeon_device; +struct radeon_ps; + +void rv770_set_clk_bypass_mode(struct radeon_device *rdev); + +struct rv7xx_ps *rv770_get_ps(struct radeon_ps *rps); +struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); + +#endif /* __RADEON_RV770_H__ */ diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c index 4a0cf597c11c..ef2f1a048cfe 100644 --- a/drivers/gpu/drm/radeon/rv770_dpm.c +++ b/drivers/gpu/drm/radeon/rv770_dpm.c @@ -24,11 +24,13 @@ #include "radeon.h" #include "radeon_asic.h" +#include "rv770.h" #include "rv770d.h" #include "r600_dpm.h" #include "rv770_dpm.h" #include "cypress_dpm.h" #include "atom.h" +#include "evergreen.h" #include <linux/seq_file.h> #define MC_CG_ARB_FREQ_F0 0x0a diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 93dcab548a83..88731b79c8f5 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -32,11 +32,14 @@ #include "atom.h" #include "clearstate_si.h" +#include "evergreen.h" +#include "r600.h" #include "radeon.h" #include "radeon_asic.h" #include "radeon_audio.h" #include "radeon_ucode.h" #include "si_blit_shaders.h" +#include "si.h" #include "sid.h" @@ -127,14 +130,6 @@ static void si_pcie_gen3_enable(struct radeon_device *rdev); static void si_program_aspm(struct radeon_device *rdev); extern void sumo_rlc_fini(struct radeon_device *rdev); extern int sumo_rlc_init(struct radeon_device *rdev); -extern int r600_ih_ring_alloc(struct radeon_device *rdev); -extern void r600_ih_ring_fini(struct radeon_device *rdev); -extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); -extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save); -extern u32 evergreen_get_number_of_dram_channels(struct radeon_device *rdev); -extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); -extern bool evergreen_is_display_hung(struct radeon_device *rdev); static void si_enable_gui_idle_interrupt(struct radeon_device *rdev, bool enable); static void si_init_pg(struct radeon_device *rdev); @@ -3093,7 +3088,7 @@ static void si_setup_rb(struct radeon_device *rdev, static void si_gpu_init(struct radeon_device *rdev) { u32 gb_addr_config = 0; - u32 mc_shared_chmap, mc_arb_ramcfg; + u32 mc_arb_ramcfg; u32 sx_debug_1; u32 hdp_host_path_cntl; u32 tmp; @@ -3205,7 +3200,7 @@ static void si_gpu_init(struct radeon_device *rdev) WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); - mc_shared_chmap = RREG32(MC_SHARED_CHMAP); + RREG32(MC_SHARED_CHMAP); mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; diff --git a/drivers/gpu/drm/radeon/si.h b/drivers/gpu/drm/radeon/si.h new file mode 100644 index 000000000000..310c58376f92 --- /dev/null +++ b/drivers/gpu/drm/radeon/si.h @@ -0,0 +1,38 @@ +/* si.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2011 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __SI_H__ +#define __SI_H__ + +struct radeon_device; +struct radeon_mc; + +int si_mc_load_microcode(struct radeon_device *rdev); +u32 si_gpu_check_soft_reset(struct radeon_device *rdev); +void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); +void si_rlc_reset(struct radeon_device *rdev); +void si_init_uvd_internal_cg(struct radeon_device *rdev); +u32 si_get_csb_size(struct radeon_device *rdev); +void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer); + +#endif /* __SI_H__ */ diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c index d2fa302a5be9..645897d1bfc3 100644 --- a/drivers/gpu/drm/radeon/si_dma.c +++ b/drivers/gpu/drm/radeon/si_dma.c @@ -25,10 +25,9 @@ #include "radeon.h" #include "radeon_asic.h" #include "radeon_trace.h" +#include "si.h" #include "sid.h" -u32 si_gpu_check_soft_reset(struct radeon_device *rdev); - /** * si_dma_is_lockup - Check if the DMA engine is locked up * diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index d1c73e9db889..91bfc4762767 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -26,11 +26,16 @@ #include <linux/seq_file.h> #include "atom.h" +#include "evergreen.h" #include "r600_dpm.h" +#include "rv770.h" #include "radeon.h" #include "radeon_asic.h" +#include "ni_dpm.h" #include "si_dpm.h" +#include "si.h" #include "sid.h" +#include "vce.h" #define MC_CG_ARB_FREQ_F0 0x0a #define MC_CG_ARB_FREQ_F1 0x0b @@ -1717,14 +1722,6 @@ static const struct si_powertune_data powertune_data_hainan = true }; -struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev); -struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev); -struct ni_power_info *ni_get_pi(struct radeon_device *rdev); -struct ni_ps *ni_get_ps(struct radeon_ps *rps); - -extern int si_mc_load_microcode(struct radeon_device *rdev); -extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); - static int si_populate_voltage_value(struct radeon_device *rdev, const struct atom_voltage_table *table, u16 value, SISLANDS_SMC_VOLTAGE_VALUE *voltage); @@ -5748,8 +5745,8 @@ static void si_request_link_speed_change_before_state_change(struct radeon_devic case RADEON_PCIE_GEN2: if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0) break; + fallthrough; #endif - /* fall through */ default: si_pi->force_pcie_gen = si_get_current_pcie_speed(rdev); break; diff --git a/drivers/gpu/drm/radeon/si_dpm.h b/drivers/gpu/drm/radeon/si_dpm.h index 1032a68be792..aa857906ef93 100644 --- a/drivers/gpu/drm/radeon/si_dpm.h +++ b/drivers/gpu/drm/radeon/si_dpm.h @@ -234,5 +234,10 @@ struct si_power_info { #define SISLANDS_CGULVPARAMETER_DFLT 0x00040035 #define SISLANDS_CGULVCONTROL_DFLT 0x1f007550 +u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock); +u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode); +void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev, + u32 max_voltage_steps, + struct atom_voltage_table *voltage_table); #endif diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c index b95d5d390caf..f74f381af05f 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.c +++ b/drivers/gpu/drm/radeon/sumo_dpm.c @@ -1865,6 +1865,26 @@ u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev) return pi->sys_info.bootup_uma_clk; } +u16 sumo_dpm_get_current_vddc(struct radeon_device *rdev) +{ + struct sumo_power_info *pi = sumo_get_pi(rdev); + struct radeon_ps *rps = &pi->current_rps; + struct sumo_ps *ps = sumo_get_ps(rps); + struct sumo_pl *pl; + u32 current_index = + (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_INDEX_MASK) >> + CURR_INDEX_SHIFT; + + if (current_index == BOOST_DPM_LEVEL) { + pl = &pi->boost_pl; + } else if (current_index >= ps->num_levels) { + return 0; + } else { + pl = &ps->levels[current_index]; + } + return sumo_convert_voltage_index_to_value(rdev, pl->vddc_index); +} + void sumo_dpm_fini(struct radeon_device *rdev) { int i; diff --git a/drivers/gpu/drm/radeon/sumo_dpm.h b/drivers/gpu/drm/radeon/sumo_dpm.h index f1651135a47a..db29d37ae270 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.h +++ b/drivers/gpu/drm/radeon/sumo_dpm.h @@ -207,6 +207,7 @@ u32 sumo_get_sleep_divider_from_id(u32 id); u32 sumo_get_sleep_divider_id_from_clock(struct radeon_device *rdev, u32 sclk, u32 min_sclk_in_sr); +struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev); /* sumo_smc.c */ void sumo_initialize_m3_arb(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/sumo_smc.c b/drivers/gpu/drm/radeon/sumo_smc.c index d78140705736..78d871606731 100644 --- a/drivers/gpu/drm/radeon/sumo_smc.c +++ b/drivers/gpu/drm/radeon/sumo_smc.c @@ -30,8 +30,6 @@ #define SUMO_SMU_SERVICE_ROUTINE_ALTVDDNB_NOTIFY 27 #define SUMO_SMU_SERVICE_ROUTINE_GFX_SRV_ID_20 20 -struct sumo_power_info *sumo_get_pi(struct radeon_device *rdev); - static void sumo_send_msg_to_smu(struct radeon_device *rdev, u32 id) { u32 gfx_int_req; diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index 4d93b84aa739..08ea1c864cb2 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c @@ -29,6 +29,7 @@ #include "radeon_asic.h" #include "trinity_dpm.h" #include "trinityd.h" +#include "vce.h" #define TRINITY_MAX_DEEPSLEEP_DIVIDER_ID 5 #define TRINITY_MINIMUM_ENGINE_CLOCK 800 @@ -116,55 +117,11 @@ static const u32 trinity_mgcg_shls_default[] = 0x00009220, 0x00090008, 0xffffffff, 0x00009294, 0x00000000, 0xffffffff }; - -static const u32 trinity_mgcg_shls_enable[] = -{ - /* Register, Value, Mask */ - 0x0000802c, 0xc0000000, 0xffffffff, - 0x000008f8, 0x00000000, 0xffffffff, - 0x000008fc, 0x00000000, 0x000133FF, - 0x000008f8, 0x00000001, 0xffffffff, - 0x000008fc, 0x00000000, 0xE00B03FC, - 0x00009150, 0x96944200, 0xffffffff -}; - -static const u32 trinity_mgcg_shls_disable[] = -{ - /* Register, Value, Mask */ - 0x0000802c, 0xc0000000, 0xffffffff, - 0x00009150, 0x00600000, 0xffffffff, - 0x000008f8, 0x00000000, 0xffffffff, - 0x000008fc, 0xffffffff, 0x000133FF, - 0x000008f8, 0x00000001, 0xffffffff, - 0x000008fc, 0xffffffff, 0xE00B03FC -}; #endif #ifndef TRINITY_SYSLS_SEQUENCE #define TRINITY_SYSLS_SEQUENCE 100 -static const u32 trinity_sysls_default[] = -{ - /* Register, Value, Mask */ - 0x000055e8, 0x00000000, 0xffffffff, - 0x0000d0bc, 0x00000000, 0xffffffff, - 0x0000d8bc, 0x00000000, 0xffffffff, - 0x000015c0, 0x000c1401, 0xffffffff, - 0x0000264c, 0x000c0400, 0xffffffff, - 0x00002648, 0x000c0400, 0xffffffff, - 0x00002650, 0x000c0400, 0xffffffff, - 0x000020b8, 0x000c0400, 0xffffffff, - 0x000020bc, 0x000c0400, 0xffffffff, - 0x000020c0, 0x000c0c80, 0xffffffff, - 0x0000f4a0, 0x000000c0, 0xffffffff, - 0x0000f4a4, 0x00680fff, 0xffffffff, - 0x00002f50, 0x00000404, 0xffffffff, - 0x000004c8, 0x00000001, 0xffffffff, - 0x0000641c, 0x00000000, 0xffffffff, - 0x00000c7c, 0x00000000, 0xffffffff, - 0x00006dfc, 0x00000000, 0xffffffff -}; - static const u32 trinity_sysls_disable[] = { /* Register, Value, Mask */ @@ -337,7 +294,6 @@ static const u32 trinity_override_mgpg_sequences[] = 0x00000204, 0x00000000, }; -extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, const u32 *seq, u32 count); static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev); diff --git a/drivers/gpu/drm/radeon/vce.h b/drivers/gpu/drm/radeon/vce.h new file mode 100644 index 000000000000..ccc9c00f0d02 --- /dev/null +++ b/drivers/gpu/drm/radeon/vce.h @@ -0,0 +1,35 @@ +/* vce.h -- Private header for radeon driver -*- linux-c -*- + * + * Copyright 2013 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#ifndef __VCE_H__ +#define __VCE_H__ + +struct radeon_device; + +void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); +void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable); + +#endif /* __VCE_H__ */ diff --git a/drivers/gpu/drm/radeon/vce_v1_0.c b/drivers/gpu/drm/radeon/vce_v1_0.c index bd75bbcf5bf6..70c5da2141d7 100644 --- a/drivers/gpu/drm/radeon/vce_v1_0.c +++ b/drivers/gpu/drm/radeon/vce_v1_0.c @@ -30,6 +30,7 @@ #include "radeon.h" #include "radeon_asic.h" #include "sid.h" +#include "vce.h" #define VCE_V1_0_FW_SIZE (256 * 1024) #define VCE_V1_0_STACK_SIZE (64 * 1024) diff --git a/drivers/gpu/drm/radeon/vce_v2_0.c b/drivers/gpu/drm/radeon/vce_v2_0.c index d6fde3659e65..163c9bfc03da 100644 --- a/drivers/gpu/drm/radeon/vce_v2_0.c +++ b/drivers/gpu/drm/radeon/vce_v2_0.c @@ -30,6 +30,7 @@ #include "radeon.h" #include "radeon_asic.h" #include "cikd.h" +#include "vce.h" #define VCE_V2_0_FW_SIZE (256 * 1024) #define VCE_V2_0_STACK_SIZE (64 * 1024) |