diff options
Diffstat (limited to 'drivers/iio/dac')
-rw-r--r-- | drivers/iio/dac/Kconfig | 8 | ||||
-rw-r--r-- | drivers/iio/dac/ad5360.c | 17 | ||||
-rw-r--r-- | drivers/iio/dac/ad5380.c | 8 | ||||
-rw-r--r-- | drivers/iio/dac/ad5421.c | 21 | ||||
-rw-r--r-- | drivers/iio/dac/ad5446.c | 18 | ||||
-rw-r--r-- | drivers/iio/dac/ad5449.c | 12 | ||||
-rw-r--r-- | drivers/iio/dac/ad5592r-base.c | 30 | ||||
-rw-r--r-- | drivers/iio/dac/ad5592r-base.h | 1 | ||||
-rw-r--r-- | drivers/iio/dac/ad5592r.c | 4 | ||||
-rw-r--r-- | drivers/iio/dac/ad5593r.c | 2 | ||||
-rw-r--r-- | drivers/iio/dac/ad5624r_spi.c | 8 | ||||
-rw-r--r-- | drivers/iio/dac/ad5686.c | 10 | ||||
-rw-r--r-- | drivers/iio/dac/ad5686.h | 2 | ||||
-rw-r--r-- | drivers/iio/dac/ad5755.c | 22 | ||||
-rw-r--r-- | drivers/iio/dac/ad5761.c | 16 | ||||
-rw-r--r-- | drivers/iio/dac/ad5764.c | 12 | ||||
-rw-r--r-- | drivers/iio/dac/ltc2632.c | 67 | ||||
-rw-r--r-- | drivers/iio/dac/ti-dac7612.c | 4 | ||||
-rw-r--r-- | drivers/iio/dac/vf610_dac.c | 11 |
19 files changed, 189 insertions, 84 deletions
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 93744011b63f..dae8d27e772d 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -279,12 +279,12 @@ config LTC1660 module will be called ltc1660. config LTC2632 - tristate "Linear Technology LTC2632-12/10/8 and LTC2636-12/10/8 DAC spi driver" + tristate "Linear Technology LTC2632-12/10/8 and similar DAC spi driver" depends on SPI help Say yes here to build support for Linear Technology - LTC2632-12, LTC2632-10, LTC2632-8, LTC2636-12, LTC2636-10 and - LTC2636-8 converters (DAC). + LTC2632, LTC2634 and LTC2636 DAC resolution 12/10/8 bit + low 0-2.5V and high 0-4.096V range converters. To compile this driver as a module, choose M here: the module will be called ltc2632. @@ -325,7 +325,7 @@ config MAX5821 config MCP4725 tristate "MCP4725/6 DAC driver" depends on I2C - ---help--- + help Say Y here if you want to build a driver for the Microchip MCP 4725/6 12-bit digital-to-analog converter (DAC) with I2C interface. diff --git a/drivers/iio/dac/ad5360.c b/drivers/iio/dac/ad5360.c index 2ac428b957e3..3e0c9e84e8da 100644 --- a/drivers/iio/dac/ad5360.c +++ b/drivers/iio/dac/ad5360.c @@ -67,6 +67,7 @@ struct ad5360_chip_info { * @chip_info: chip model specific constants, available modes etc * @vref_reg: vref supply regulators * @ctrl: control register cache + * @lock lock to protect the data buffer during SPI ops * @data: spi transfer buffers */ @@ -75,6 +76,7 @@ struct ad5360_state { const struct ad5360_chip_info *chip_info; struct regulator_bulk_data vref_reg[3]; unsigned int ctrl; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the @@ -205,10 +207,11 @@ static int ad5360_write(struct iio_dev *indio_dev, unsigned int cmd, unsigned int addr, unsigned int val, unsigned int shift) { int ret; + struct ad5360_state *st = iio_priv(indio_dev); - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad5360_write_unlocked(indio_dev, cmd, addr, val, shift); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -229,7 +232,7 @@ static int ad5360_read(struct iio_dev *indio_dev, unsigned int type, }, }; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0].d32 = cpu_to_be32(AD5360_CMD(AD5360_CMD_SPECIAL_FUNCTION) | AD5360_ADDR(AD5360_REG_SF_READBACK) | @@ -240,7 +243,7 @@ static int ad5360_read(struct iio_dev *indio_dev, unsigned int type, if (ret >= 0) ret = be32_to_cpu(st->data[1].d32) & 0xffff; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -261,7 +264,7 @@ static int ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set, struct ad5360_state *st = iio_priv(indio_dev); unsigned int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->ctrl |= set; st->ctrl &= ~clr; @@ -269,7 +272,7 @@ static int ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set, ret = ad5360_write_unlocked(indio_dev, AD5360_CMD_SPECIAL_FUNCTION, AD5360_REG_SF_CTRL, st->ctrl, 0); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -479,6 +482,8 @@ static int ad5360_probe(struct spi_device *spi) indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->num_channels = st->chip_info->num_channels; + mutex_init(&st->lock); + ret = ad5360_alloc_channels(indio_dev); if (ret) { dev_err(&spi->dev, "Failed to allocate channel spec: %d\n", ret); diff --git a/drivers/iio/dac/ad5380.c b/drivers/iio/dac/ad5380.c index 2ebe08326048..b37e5675f716 100644 --- a/drivers/iio/dac/ad5380.c +++ b/drivers/iio/dac/ad5380.c @@ -51,6 +51,7 @@ struct ad5380_chip_info { * @vref_reg: vref supply regulator * @vref: actual reference voltage used in uA * @pwr_down: whether the chip is currently in power down mode + * @lock lock to protect the data buffer during regmap ops */ struct ad5380_state { @@ -59,6 +60,7 @@ struct ad5380_state { struct regulator *vref_reg; int vref; bool pwr_down; + struct mutex lock; }; enum ad5380_type { @@ -98,7 +100,7 @@ static ssize_t ad5380_write_dac_powerdown(struct iio_dev *indio_dev, if (ret) return ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (pwr_down) ret = regmap_write(st->regmap, AD5380_REG_SF_PWR_DOWN, 0); @@ -107,7 +109,7 @@ static ssize_t ad5380_write_dac_powerdown(struct iio_dev *indio_dev, st->pwr_down = pwr_down; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -390,6 +392,8 @@ static int ad5380_probe(struct device *dev, struct regmap *regmap, indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->num_channels = st->chip_info->num_channels; + mutex_init(&st->lock); + ret = ad5380_alloc_channels(indio_dev); if (ret) { dev_err(dev, "Failed to allocate channel spec: %d\n", ret); diff --git a/drivers/iio/dac/ad5421.c b/drivers/iio/dac/ad5421.c index 63063e85cd0a..fec27764cea8 100644 --- a/drivers/iio/dac/ad5421.c +++ b/drivers/iio/dac/ad5421.c @@ -62,12 +62,14 @@ * @current_range: current range which the device is configured for * @data: spi transfer buffers * @fault_mask: software masking of events + * @lock lock to protect the data buffer during SPI ops */ struct ad5421_state { struct spi_device *spi; unsigned int ctrl; enum ad5421_current_range current_range; unsigned int fault_mask; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the @@ -142,11 +144,12 @@ static int ad5421_write_unlocked(struct iio_dev *indio_dev, static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg, unsigned int val) { + struct ad5421_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad5421_write_unlocked(indio_dev, reg, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -166,7 +169,7 @@ static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg) }, }; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); @@ -174,7 +177,7 @@ static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg) if (ret >= 0) ret = be32_to_cpu(st->data[1].d32) & 0xffff; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -185,14 +188,14 @@ static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set, struct ad5421_state *st = iio_priv(indio_dev); unsigned int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->ctrl &= ~clr; st->ctrl |= set; ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -400,12 +403,12 @@ static int ad5421_write_event_config(struct iio_dev *indio_dev, return -EINVAL; } - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (state) st->fault_mask |= mask; else st->fault_mask &= ~mask; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return 0; } @@ -491,6 +494,8 @@ static int ad5421_probe(struct spi_device *spi) indio_dev->channels = ad5421_channels; indio_dev->num_channels = ARRAY_SIZE(ad5421_channels); + mutex_init(&st->lock); + st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE | AD5421_CTRL_AUTO_FAULT_READBACK; diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c index 61c670f7fc5f..8f8afc8999bc 100644 --- a/drivers/iio/dac/ad5446.c +++ b/drivers/iio/dac/ad5446.c @@ -21,6 +21,8 @@ #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> +#include <asm/unaligned.h> + #define MODE_PWRDWN_1k 0x1 #define MODE_PWRDWN_100k 0x2 #define MODE_PWRDWN_TRISTATE 0x3 @@ -31,6 +33,7 @@ * @chip_info: chip model specific constants, available modes etc * @reg: supply regulator * @vref_mv: actual reference voltage used + * @lock lock to protect the data buffer during write ops */ struct ad5446_state { @@ -41,6 +44,7 @@ struct ad5446_state { unsigned cached_val; unsigned pwr_down_mode; unsigned pwr_down; + struct mutex lock; }; /** @@ -110,7 +114,7 @@ static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev, if (ret) return ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->pwr_down = powerdown; if (st->pwr_down) { @@ -121,7 +125,7 @@ static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev, } ret = st->chip_info->write(st, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -195,11 +199,11 @@ static int ad5446_write_raw(struct iio_dev *indio_dev, return -EINVAL; val <<= chan->scan_type.shift; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->cached_val = val; if (!st->pwr_down) ret = st->chip_info->write(st, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); break; default: ret = -EINVAL; @@ -254,6 +258,8 @@ static int ad5446_probe(struct device *dev, const char *name, indio_dev->channels = &st->chip_info->channel; indio_dev->num_channels = 1; + mutex_init(&st->lock); + st->pwr_down_mode = MODE_PWRDWN_1k; if (st->chip_info->int_vref_mv) @@ -302,9 +308,7 @@ static int ad5660_write(struct ad5446_state *st, unsigned val) struct spi_device *spi = to_spi_device(st->dev); uint8_t data[3]; - data[0] = (val >> 16) & 0xFF; - data[1] = (val >> 8) & 0xFF; - data[2] = val & 0xFF; + put_unaligned_be24(val, &data[0]); return spi_write(spi, data, sizeof(data)); } diff --git a/drivers/iio/dac/ad5449.c b/drivers/iio/dac/ad5449.c index fed3ebaccac4..d739b10e5236 100644 --- a/drivers/iio/dac/ad5449.c +++ b/drivers/iio/dac/ad5449.c @@ -56,11 +56,13 @@ struct ad5449_chip_info { * @has_sdo: whether the SDO line is connected * @dac_cache: Cache for the DAC values * @data: spi transfer buffers + * @lock lock to protect the data buffer during SPI ops */ struct ad5449 { struct spi_device *spi; const struct ad5449_chip_info *chip_info; struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS]; + struct mutex lock; bool has_sdo; uint16_t dac_cache[AD5449_MAX_CHANNELS]; @@ -87,10 +89,10 @@ static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr, struct ad5449 *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0] = cpu_to_be16((addr << 12) | val); ret = spi_write(st->spi, st->data, 2); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -112,7 +114,7 @@ static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr, }, }; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0] = cpu_to_be16(addr << 12); st->data[1] = cpu_to_be16(AD5449_CMD_NOOP); @@ -123,7 +125,7 @@ static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr, *val = be16_to_cpu(st->data[1]); out_unlock: - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -302,6 +304,8 @@ static int ad5449_spi_probe(struct spi_device *spi) indio_dev->channels = st->chip_info->channels; indio_dev->num_channels = st->chip_info->num_channels; + mutex_init(&st->lock); + if (st->chip_info->has_ctrl) { unsigned int ctrl = 0x00; if (pdata) { diff --git a/drivers/iio/dac/ad5592r-base.c b/drivers/iio/dac/ad5592r-base.c index e2110113e884..410e90e5f75f 100644 --- a/drivers/iio/dac/ad5592r-base.c +++ b/drivers/iio/dac/ad5592r-base.c @@ -156,7 +156,6 @@ static void ad5592r_gpio_cleanup(struct ad5592r_state *st) static int ad5592r_reset(struct ad5592r_state *st) { struct gpio_desc *gpio; - struct iio_dev *iio_dev = iio_priv_to_dev(st); gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(gpio)) @@ -166,10 +165,10 @@ static int ad5592r_reset(struct ad5592r_state *st) udelay(1); gpiod_set_value(gpio, 1); } else { - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); /* Writing this magic value resets the device */ st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac); - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); } udelay(250); @@ -197,7 +196,6 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st) const struct ad5592r_rw_ops *ops = st->ops; int ret; unsigned i; - struct iio_dev *iio_dev = iio_priv_to_dev(st); u8 pulldown = 0, tristate = 0, dac = 0, adc = 0; u16 read_back; @@ -247,7 +245,7 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st) } } - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); /* Pull down unused pins to GND */ ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown); @@ -285,7 +283,7 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st) ret = -EIO; err_unlock: - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -314,11 +312,11 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev, if (!chan->output) return -EINVAL; - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); ret = st->ops->write_dac(st, chan->channel, val); if (!ret) st->cached_dac[chan->channel] = val; - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); return ret; case IIO_CHAN_INFO_SCALE: if (chan->type == IIO_VOLTAGE) { @@ -333,12 +331,12 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev, else return -EINVAL; - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); ret = st->ops->reg_read(st, AD5592R_REG_CTRL, &st->cached_gp_ctrl); if (ret < 0) { - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -360,7 +358,7 @@ static int ad5592r_write_raw(struct iio_dev *iio_dev, ret = st->ops->reg_write(st, AD5592R_REG_CTRL, st->cached_gp_ctrl); - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -382,7 +380,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, switch (m) { case IIO_CHAN_INFO_RAW: - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); if (!chan->output) { ret = st->ops->read_adc(st, chan->channel, &read_val); @@ -419,7 +417,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, } else { int mult; - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); if (chan->output) mult = !!(st->cached_gp_ctrl & @@ -437,7 +435,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, case IIO_CHAN_INFO_OFFSET: ret = ad5592r_get_vref(st); - mutex_lock(&iio_dev->mlock); + mutex_lock(&st->lock); if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE) *val = (-34365 * 25) / ret; @@ -450,7 +448,7 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, } unlock: - mutex_unlock(&iio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -625,6 +623,8 @@ int ad5592r_probe(struct device *dev, const char *name, iio_dev->info = &ad5592r_info; iio_dev->modes = INDIO_DIRECT_MODE; + mutex_init(&st->lock); + ad5592r_init_scales(st, ad5592r_get_vref(st)); ret = ad5592r_reset(st); diff --git a/drivers/iio/dac/ad5592r-base.h b/drivers/iio/dac/ad5592r-base.h index 4774e4cd9c11..23dac2f1ff8a 100644 --- a/drivers/iio/dac/ad5592r-base.h +++ b/drivers/iio/dac/ad5592r-base.h @@ -52,6 +52,7 @@ struct ad5592r_state { struct regulator *reg; struct gpio_chip gpiochip; struct mutex gpio_lock; /* Protect cached gpio_out, gpio_val, etc. */ + struct mutex lock; unsigned int num_channels; const struct ad5592r_rw_ops *ops; int scale_avail[2][2]; diff --git a/drivers/iio/dac/ad5592r.c b/drivers/iio/dac/ad5592r.c index 34ba059a77da..49308ad13c4b 100644 --- a/drivers/iio/dac/ad5592r.c +++ b/drivers/iio/dac/ad5592r.c @@ -98,7 +98,7 @@ static int ad5592r_reg_read(struct ad5592r_state *st, u8 reg, u16 *value) return 0; } -static int ad5593r_gpio_read(struct ad5592r_state *st, u8 *value) +static int ad5592r_gpio_read(struct ad5592r_state *st, u8 *value) { int ret; @@ -121,7 +121,7 @@ static const struct ad5592r_rw_ops ad5592r_rw_ops = { .read_adc = ad5592r_read_adc, .reg_write = ad5592r_reg_write, .reg_read = ad5592r_reg_read, - .gpio_read = ad5593r_gpio_read, + .gpio_read = ad5592r_gpio_read, }; static int ad5592r_spi_probe(struct spi_device *spi) diff --git a/drivers/iio/dac/ad5593r.c b/drivers/iio/dac/ad5593r.c index 44ea3b8117d0..1fbe9c019c7f 100644 --- a/drivers/iio/dac/ad5593r.c +++ b/drivers/iio/dac/ad5593r.c @@ -134,5 +134,5 @@ static struct i2c_driver ad5593r_driver = { module_i2c_driver(ad5593r_driver); MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>"); -MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters"); +MODULE_DESCRIPTION("Analog Devices AD5593R multi-channel converters"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/ad5624r_spi.c b/drivers/iio/dac/ad5624r_spi.c index e6c022e1dc1c..2015a5df840c 100644 --- a/drivers/iio/dac/ad5624r_spi.c +++ b/drivers/iio/dac/ad5624r_spi.c @@ -18,6 +18,8 @@ #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> +#include <asm/unaligned.h> + #include "ad5624r.h" static int ad5624r_spi_write(struct spi_device *spi, @@ -35,11 +37,9 @@ static int ad5624r_spi_write(struct spi_device *spi, * for the AD5664R, AD5644R, and AD5624R, respectively. */ data = (0 << 22) | (cmd << 19) | (addr << 16) | (val << shift); - msg[0] = data >> 16; - msg[1] = data >> 8; - msg[2] = data; + put_unaligned_be24(data, &msg[0]); - return spi_write(spi, msg, 3); + return spi_write(spi, msg, sizeof(msg)); } static int ad5624r_read_raw(struct iio_dev *indio_dev, diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c index e06b29c565b9..8dd67da0a7da 100644 --- a/drivers/iio/dac/ad5686.c +++ b/drivers/iio/dac/ad5686.c @@ -127,9 +127,9 @@ static int ad5686_read_raw(struct iio_dev *indio_dev, switch (m) { case IIO_CHAN_INFO_RAW: - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = st->read(st, chan->address); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); if (ret < 0) return ret; *val = (ret >> chan->scan_type.shift) & @@ -157,12 +157,12 @@ static int ad5686_write_raw(struct iio_dev *indio_dev, if (val > (1 << chan->scan_type.realbits) || val < 0) return -EINVAL; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = st->write(st, AD5686_CMD_WRITE_INPUT_N_UPDATE_N, chan->address, val << chan->scan_type.shift); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); break; default: ret = -EINVAL; @@ -468,6 +468,8 @@ int ad5686_probe(struct device *dev, indio_dev->channels = st->chip_info->channels; indio_dev->num_channels = st->chip_info->num_channels; + mutex_init(&st->lock); + switch (st->chip_info->regmap_type) { case AD5310_REGMAP: cmd = AD5686_CMD_CONTROL_REG; diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h index 70a779939ddb..52009b5eef88 100644 --- a/drivers/iio/dac/ad5686.h +++ b/drivers/iio/dac/ad5686.h @@ -117,6 +117,7 @@ struct ad5686_chip_info { * @pwr_down_mask: power down mask * @pwr_down_mode: current power down mode * @use_internal_vref: set to true if the internal reference voltage is used + * @lock lock to protect the data buffer during regmap ops * @data: spi transfer buffers */ @@ -130,6 +131,7 @@ struct ad5686_state { ad5686_write_func write; ad5686_read_func read; bool use_internal_vref; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the diff --git a/drivers/iio/dac/ad5755.c b/drivers/iio/dac/ad5755.c index 388ddd14bfd0..7723bd313fc6 100644 --- a/drivers/iio/dac/ad5755.c +++ b/drivers/iio/dac/ad5755.c @@ -82,6 +82,7 @@ struct ad5755_chip_info { * @pwr_down: bitmask which contains hether a channel is powered down or not * @ctrl: software shadow of the channel ctrl registers * @channels: iio channel spec for the device + * @lock lock to protect the data buffer during SPI ops * @data: spi transfer buffers */ struct ad5755_state { @@ -90,6 +91,7 @@ struct ad5755_state { unsigned int pwr_down; unsigned int ctrl[AD5755_NUM_CHANNELS]; struct iio_chan_spec channels[AD5755_NUM_CHANNELS]; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the @@ -174,11 +176,12 @@ static int ad5755_write_ctrl_unlocked(struct iio_dev *indio_dev, static int ad5755_write(struct iio_dev *indio_dev, unsigned int reg, unsigned int val) { + struct ad5755_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad5755_write_unlocked(indio_dev, reg, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -186,11 +189,12 @@ static int ad5755_write(struct iio_dev *indio_dev, unsigned int reg, static int ad5755_write_ctrl(struct iio_dev *indio_dev, unsigned int channel, unsigned int reg, unsigned int val) { + struct ad5755_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = ad5755_write_ctrl_unlocked(indio_dev, channel, reg, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -211,7 +215,7 @@ static int ad5755_read(struct iio_dev *indio_dev, unsigned int addr) }, }; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0].d32 = cpu_to_be32(AD5755_READ_FLAG | (addr << 16)); st->data[1].d32 = cpu_to_be32(AD5755_NOOP); @@ -220,7 +224,7 @@ static int ad5755_read(struct iio_dev *indio_dev, unsigned int addr) if (ret >= 0) ret = be32_to_cpu(st->data[1].d32) & 0xffff; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -246,7 +250,7 @@ static int ad5755_set_channel_pwr_down(struct iio_dev *indio_dev, struct ad5755_state *st = iio_priv(indio_dev); unsigned int mask = BIT(channel); - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if ((bool)(st->pwr_down & mask) == pwr_down) goto out_unlock; @@ -266,7 +270,7 @@ static int ad5755_set_channel_pwr_down(struct iio_dev *indio_dev, } out_unlock: - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return 0; } @@ -746,6 +750,8 @@ static int ad5755_probe(struct spi_device *spi) indio_dev->modes = INDIO_DIRECT_MODE; indio_dev->num_channels = AD5755_NUM_CHANNELS; + mutex_init(&st->lock); + if (spi->dev.of_node) pdata = ad5755_parse_dt(&spi->dev); else diff --git a/drivers/iio/dac/ad5761.c b/drivers/iio/dac/ad5761.c index 4fb42b743f0f..67c4fa75c6f1 100644 --- a/drivers/iio/dac/ad5761.c +++ b/drivers/iio/dac/ad5761.c @@ -3,7 +3,7 @@ * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter * * Copyright 2016 Qtechnology A/S - * 2016 Ricardo Ribalda <ricardo.ribalda@gmail.com> + * 2016 Ricardo Ribalda <ribalda@kernel.org> */ #include <linux/kernel.h> #include <linux/module.h> @@ -57,11 +57,13 @@ enum ad5761_supported_device_ids { * @use_intref: true when the internal voltage reference is used * @vref: actual voltage reference in mVolts * @range: output range mode used + * @lock lock to protect the data buffer during SPI ops * @data: cache aligned spi buffer */ struct ad5761_state { struct spi_device *spi; struct regulator *vref_reg; + struct mutex lock; bool use_intref; int vref; @@ -124,9 +126,9 @@ static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val) struct ad5761_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = _ad5761_spi_write(st, addr, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -163,9 +165,9 @@ static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val) struct ad5761_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); ret = _ad5761_spi_read(st, addr, val); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -368,6 +370,8 @@ static int ad5761_probe(struct spi_device *spi) if (pdata) voltage_range = pdata->voltage_range; + mutex_init(&st->lock); + ret = ad5761_spi_set_range(st, voltage_range); if (ret) goto disable_regulator_err; @@ -423,6 +427,6 @@ static struct spi_driver ad5761_driver = { }; module_spi_driver(ad5761_driver); -MODULE_AUTHOR("Ricardo Ribalda <ricardo.ribalda@gmail.com>"); +MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>"); MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/ad5764.c b/drivers/iio/dac/ad5764.c index f7ab211604a1..5b0f0fe354f6 100644 --- a/drivers/iio/dac/ad5764.c +++ b/drivers/iio/dac/ad5764.c @@ -46,6 +46,7 @@ struct ad5764_chip_info { * @spi: spi_device * @chip_info: chip info * @vref_reg: vref supply regulators + * @lock lock to protect the data buffer during SPI ops * @data: spi transfer buffers */ @@ -53,6 +54,7 @@ struct ad5764_state { struct spi_device *spi; const struct ad5764_chip_info *chip_info; struct regulator_bulk_data vref_reg[2]; + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the @@ -126,11 +128,11 @@ static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg, struct ad5764_state *st = iio_priv(indio_dev); int ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0].d32 = cpu_to_be32((reg << 16) | val); ret = spi_write(st->spi, &st->data[0].d8[1], 3); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -151,7 +153,7 @@ static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg, }, }; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); @@ -159,7 +161,7 @@ static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg, if (ret >= 0) *val = be32_to_cpu(st->data[1].d32) & 0xffff; - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -295,6 +297,8 @@ static int ad5764_probe(struct spi_device *spi) indio_dev->num_channels = AD5764_NUM_CHANNELS; indio_dev->channels = st->chip_info->channels; + mutex_init(&st->lock); + if (st->chip_info->int_vref == 0) { st->vref_reg[0].supply = "vrefAB"; st->vref_reg[1].supply = "vrefCD"; diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c index 7adc91056aa1..f891311f05cf 100644 --- a/drivers/iio/dac/ltc2632.c +++ b/drivers/iio/dac/ltc2632.c @@ -12,6 +12,8 @@ #include <linux/iio/iio.h> #include <linux/regulator/consumer.h> +#include <asm/unaligned.h> + #define LTC2632_CMD_WRITE_INPUT_N 0x0 #define LTC2632_CMD_UPDATE_DAC_N 0x1 #define LTC2632_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2 @@ -24,6 +26,7 @@ /** * struct ltc2632_chip_info - chip specific information * @channels: channel spec for the DAC + * @num_channels: DAC channel count of the chip * @vref_mv: internal reference voltage */ struct ltc2632_chip_info { @@ -53,6 +56,12 @@ enum ltc2632_supported_device_ids { ID_LTC2632H12, ID_LTC2632H10, ID_LTC2632H8, + ID_LTC2634L12, + ID_LTC2634L10, + ID_LTC2634L8, + ID_LTC2634H12, + ID_LTC2634H10, + ID_LTC2634H8, ID_LTC2636L12, ID_LTC2636L10, ID_LTC2636L8, @@ -75,9 +84,7 @@ static int ltc2632_spi_write(struct spi_device *spi, * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits. */ data = (cmd << 20) | (addr << 16) | (val << shift); - msg[0] = data >> 16; - msg[1] = data >> 8; - msg[2] = data; + put_unaligned_be24(data, &msg[0]); return spi_write(spi, msg, sizeof(msg)); } @@ -235,6 +242,36 @@ static const struct ltc2632_chip_info ltc2632_chip_info_tbl[] = { .num_channels = 2, .vref_mv = 4096, }, + [ID_LTC2634L12] = { + .channels = ltc2632x12_channels, + .num_channels = 4, + .vref_mv = 2500, + }, + [ID_LTC2634L10] = { + .channels = ltc2632x10_channels, + .num_channels = 4, + .vref_mv = 2500, + }, + [ID_LTC2634L8] = { + .channels = ltc2632x8_channels, + .num_channels = 4, + .vref_mv = 2500, + }, + [ID_LTC2634H12] = { + .channels = ltc2632x12_channels, + .num_channels = 4, + .vref_mv = 4096, + }, + [ID_LTC2634H10] = { + .channels = ltc2632x10_channels, + .num_channels = 4, + .vref_mv = 4096, + }, + [ID_LTC2634H8] = { + .channels = ltc2632x8_channels, + .num_channels = 4, + .vref_mv = 4096, + }, [ID_LTC2636L12] = { .channels = ltc2632x12_channels, .num_channels = 8, @@ -356,6 +393,12 @@ static const struct spi_device_id ltc2632_id[] = { { "ltc2632-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H12] }, { "ltc2632-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H10] }, { "ltc2632-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H8] }, + { "ltc2634-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L12] }, + { "ltc2634-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L10] }, + { "ltc2634-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634L8] }, + { "ltc2634-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H12] }, + { "ltc2634-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H10] }, + { "ltc2634-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2634H8] }, { "ltc2636-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L12] }, { "ltc2636-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L10] }, { "ltc2636-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636L8] }, @@ -386,6 +429,24 @@ static const struct of_device_id ltc2632_of_match[] = { .compatible = "lltc,ltc2632-h8", .data = <c2632_chip_info_tbl[ID_LTC2632H8] }, { + .compatible = "lltc,ltc2634-l12", + .data = <c2632_chip_info_tbl[ID_LTC2634L12] + }, { + .compatible = "lltc,ltc2634-l10", + .data = <c2632_chip_info_tbl[ID_LTC2634L10] + }, { + .compatible = "lltc,ltc2634-l8", + .data = <c2632_chip_info_tbl[ID_LTC2634L8] + }, { + .compatible = "lltc,ltc2634-h12", + .data = <c2632_chip_info_tbl[ID_LTC2634H12] + }, { + .compatible = "lltc,ltc2634-h10", + .data = <c2632_chip_info_tbl[ID_LTC2634H10] + }, { + .compatible = "lltc,ltc2634-h8", + .data = <c2632_chip_info_tbl[ID_LTC2634H8] + }, { .compatible = "lltc,ltc2636-l12", .data = <c2632_chip_info_tbl[ID_LTC2636L12] }, { diff --git a/drivers/iio/dac/ti-dac7612.c b/drivers/iio/dac/ti-dac7612.c index c46805144dd4..de0c6573cd97 100644 --- a/drivers/iio/dac/ti-dac7612.c +++ b/drivers/iio/dac/ti-dac7612.c @@ -3,7 +3,7 @@ * DAC7612 Dual, 12-Bit Serial input Digital-to-Analog Converter * * Copyright 2019 Qtechnology A/S - * 2019 Ricardo Ribalda <ricardo@ribalda.com> + * 2019 Ricardo Ribalda <ribalda@kernel.org> * * Licensed under the GPL-2. */ @@ -179,6 +179,6 @@ static struct spi_driver dac7612_driver = { }; module_spi_driver(dac7612_driver); -MODULE_AUTHOR("Ricardo Ribalda <ricardo@ribalda.com>"); +MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>"); MODULE_DESCRIPTION("Texas Instruments DAC7612 DAC driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/iio/dac/vf610_dac.c b/drivers/iio/dac/vf610_dac.c index 7f1e9317c3f3..9417a4a3e22a 100644 --- a/drivers/iio/dac/vf610_dac.c +++ b/drivers/iio/dac/vf610_dac.c @@ -36,6 +36,7 @@ struct vf610_dac { struct device *dev; enum vf610_conversion_mode_sel conv_mode; void __iomem *regs; + struct mutex lock; }; static void vf610_dac_init(struct vf610_dac *info) @@ -64,7 +65,7 @@ static int vf610_set_conversion_mode(struct iio_dev *indio_dev, struct vf610_dac *info = iio_priv(indio_dev); int val; - mutex_lock(&indio_dev->mlock); + mutex_lock(&info->lock); info->conv_mode = mode; val = readl(info->regs + VF610_DACx_STATCTRL); if (mode) @@ -72,7 +73,7 @@ static int vf610_set_conversion_mode(struct iio_dev *indio_dev, else val &= ~VF610_DAC_LPEN; writel(val, info->regs + VF610_DACx_STATCTRL); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&info->lock); return 0; } @@ -147,9 +148,9 @@ static int vf610_write_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: - mutex_lock(&indio_dev->mlock); + mutex_lock(&info->lock); writel(VF610_DAC_DAT0(val), info->regs); - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&info->lock); return 0; default: @@ -205,6 +206,8 @@ static int vf610_dac_probe(struct platform_device *pdev) indio_dev->channels = vf610_dac_iio_channels; indio_dev->num_channels = ARRAY_SIZE(vf610_dac_iio_channels); + mutex_init(&info->lock); + ret = clk_prepare_enable(info->clk); if (ret) { dev_err(&pdev->dev, |