diff options
Diffstat (limited to 'drivers/mfd/cs42l43.c')
| -rw-r--r-- | drivers/mfd/cs42l43.c | 124 |
1 files changed, 66 insertions, 58 deletions
diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c index 7b6d07cbe6fc..a0fb2dc6c3b2 100644 --- a/drivers/mfd/cs42l43.c +++ b/drivers/mfd/cs42l43.c @@ -6,51 +6,57 @@ * Cirrus Logic International Semiconductor Ltd. */ +#include <linux/array_size.h> #include <linux/bitops.h> #include <linux/build_bug.h> #include <linux/delay.h> +#include <linux/device.h> #include <linux/err.h> -#include <linux/errno.h> #include <linux/firmware.h> +#include <linux/gpio/consumer.h> #include <linux/jiffies.h> #include <linux/mfd/core.h> +#include <linux/mfd/cs42l43.h> #include <linux/mfd/cs42l43-regs.h> #include <linux/module.h> +#include <linux/pm.h> #include <linux/pm_runtime.h> +#include <linux/regmap.h> #include <linux/soundwire/sdw.h> +#include <linux/types.h> #include "cs42l43.h" -#define CS42L43_RESET_DELAY 20 +#define CS42L43_RESET_DELAY_MS 20 -#define CS42L43_SDW_ATTACH_TIMEOUT 500 -#define CS42L43_SDW_DETACH_TIMEOUT 100 +#define CS42L43_SDW_ATTACH_TIMEOUT_MS 500 +#define CS42L43_SDW_DETACH_TIMEOUT_MS 100 #define CS42L43_MCU_BOOT_STAGE1 1 #define CS42L43_MCU_BOOT_STAGE2 2 #define CS42L43_MCU_BOOT_STAGE3 3 #define CS42L43_MCU_BOOT_STAGE4 4 -#define CS42L43_MCU_POLL 5000 -#define CS42L43_MCU_CMD_TIMEOUT 20000 +#define CS42L43_MCU_POLL_US 5000 +#define CS42L43_MCU_CMD_TIMEOUT_US 20000 #define CS42L43_MCU_UPDATE_FORMAT 3 #define CS42L43_MCU_UPDATE_OFFSET 0x100000 -#define CS42L43_MCU_UPDATE_TIMEOUT 500000 +#define CS42L43_MCU_UPDATE_TIMEOUT_US 500000 #define CS42L43_MCU_UPDATE_RETRIES 5 #define CS42L43_MCU_SUPPORTED_REV 0x2105 #define CS42L43_MCU_SHADOW_REGS_REQUIRED_REV 0x2200 #define CS42L43_MCU_SUPPORTED_BIOS_REV 0x0001 -#define CS42L43_VDDP_DELAY 50 -#define CS42L43_VDDD_DELAY 1000 +#define CS42L43_VDDP_DELAY_US 50 +#define CS42L43_VDDD_DELAY_US 1000 -#define CS42L43_AUTOSUSPEND_TIME 250 +#define CS42L43_AUTOSUSPEND_TIME_MS 250 struct cs42l43_patch_header { __le16 version; __le16 size; - u8 reserved; - u8 secure; + __u8 reserved; + __u8 secure; __le16 bss_size; __le32 apply_addr; __le32 checksum; @@ -84,7 +90,7 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_DRV_CTRL_5, 0x136C00C0 }, { CS42L43_GPIO_CTRL1, 0x00000707 }, { CS42L43_GPIO_CTRL2, 0x00000000 }, - { CS42L43_GPIO_FN_SEL, 0x00000000 }, + { CS42L43_GPIO_FN_SEL, 0x00000004 }, { CS42L43_MCLK_SRC_SEL, 0x00000000 }, { CS42L43_SAMPLE_RATE1, 0x00000003 }, { CS42L43_SAMPLE_RATE2, 0x00000003 }, @@ -131,38 +137,38 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_ASP_TX_CH4_CTRL, 0x00170091 }, { CS42L43_ASP_TX_CH5_CTRL, 0x001700C1 }, { CS42L43_ASP_TX_CH6_CTRL, 0x001700F1 }, - { CS42L43_ASPTX1_INPUT, 0x00800000 }, - { CS42L43_ASPTX2_INPUT, 0x00800000 }, - { CS42L43_ASPTX3_INPUT, 0x00800000 }, - { CS42L43_ASPTX4_INPUT, 0x00800000 }, - { CS42L43_ASPTX5_INPUT, 0x00800000 }, - { CS42L43_ASPTX6_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP1_CH1_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP1_CH2_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP1_CH3_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP1_CH4_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP2_CH1_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP2_CH2_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP3_CH1_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP3_CH2_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP4_CH1_INPUT, 0x00800000 }, - { CS42L43_SWIRE_DP4_CH2_INPUT, 0x00800000 }, - { CS42L43_ASRC_INT1_INPUT1, 0x00800000 }, - { CS42L43_ASRC_INT2_INPUT1, 0x00800000 }, - { CS42L43_ASRC_INT3_INPUT1, 0x00800000 }, - { CS42L43_ASRC_INT4_INPUT1, 0x00800000 }, - { CS42L43_ASRC_DEC1_INPUT1, 0x00800000 }, - { CS42L43_ASRC_DEC2_INPUT1, 0x00800000 }, - { CS42L43_ASRC_DEC3_INPUT1, 0x00800000 }, - { CS42L43_ASRC_DEC4_INPUT1, 0x00800000 }, - { CS42L43_ISRC1INT1_INPUT1, 0x00800000 }, - { CS42L43_ISRC1INT2_INPUT1, 0x00800000 }, - { CS42L43_ISRC1DEC1_INPUT1, 0x00800000 }, - { CS42L43_ISRC1DEC2_INPUT1, 0x00800000 }, - { CS42L43_ISRC2INT1_INPUT1, 0x00800000 }, - { CS42L43_ISRC2INT2_INPUT1, 0x00800000 }, - { CS42L43_ISRC2DEC1_INPUT1, 0x00800000 }, - { CS42L43_ISRC2DEC2_INPUT1, 0x00800000 }, + { CS42L43_ASPTX1_INPUT, 0x00000000 }, + { CS42L43_ASPTX2_INPUT, 0x00000000 }, + { CS42L43_ASPTX3_INPUT, 0x00000000 }, + { CS42L43_ASPTX4_INPUT, 0x00000000 }, + { CS42L43_ASPTX5_INPUT, 0x00000000 }, + { CS42L43_ASPTX6_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP1_CH1_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP1_CH2_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP1_CH3_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP1_CH4_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP2_CH1_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP2_CH2_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP3_CH1_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP3_CH2_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP4_CH1_INPUT, 0x00000000 }, + { CS42L43_SWIRE_DP4_CH2_INPUT, 0x00000000 }, + { CS42L43_ASRC_INT1_INPUT1, 0x00000000 }, + { CS42L43_ASRC_INT2_INPUT1, 0x00000000 }, + { CS42L43_ASRC_INT3_INPUT1, 0x00000000 }, + { CS42L43_ASRC_INT4_INPUT1, 0x00000000 }, + { CS42L43_ASRC_DEC1_INPUT1, 0x00000000 }, + { CS42L43_ASRC_DEC2_INPUT1, 0x00000000 }, + { CS42L43_ASRC_DEC3_INPUT1, 0x00000000 }, + { CS42L43_ASRC_DEC4_INPUT1, 0x00000000 }, + { CS42L43_ISRC1INT1_INPUT1, 0x00000000 }, + { CS42L43_ISRC1INT2_INPUT1, 0x00000000 }, + { CS42L43_ISRC1DEC1_INPUT1, 0x00000000 }, + { CS42L43_ISRC1DEC2_INPUT1, 0x00000000 }, + { CS42L43_ISRC2INT1_INPUT1, 0x00000000 }, + { CS42L43_ISRC2INT2_INPUT1, 0x00000000 }, + { CS42L43_ISRC2DEC1_INPUT1, 0x00000000 }, + { CS42L43_ISRC2DEC2_INPUT1, 0x00000000 }, { CS42L43_EQ1MIX_INPUT1, 0x00800000 }, { CS42L43_EQ1MIX_INPUT2, 0x00800000 }, { CS42L43_EQ1MIX_INPUT3, 0x00800000 }, @@ -171,8 +177,8 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_EQ2MIX_INPUT2, 0x00800000 }, { CS42L43_EQ2MIX_INPUT3, 0x00800000 }, { CS42L43_EQ2MIX_INPUT4, 0x00800000 }, - { CS42L43_SPDIF1_INPUT1, 0x00800000 }, - { CS42L43_SPDIF2_INPUT1, 0x00800000 }, + { CS42L43_SPDIF1_INPUT1, 0x00000000 }, + { CS42L43_SPDIF2_INPUT1, 0x00000000 }, { CS42L43_AMP1MIX_INPUT1, 0x00800000 }, { CS42L43_AMP1MIX_INPUT2, 0x00800000 }, { CS42L43_AMP1MIX_INPUT3, 0x00800000 }, @@ -217,7 +223,7 @@ const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { { CS42L43_CTRL_REG, 0x00000006 }, { CS42L43_FDIV_FRAC, 0x40000000 }, { CS42L43_CAL_RATIO, 0x00000080 }, - { CS42L43_SPI_CLK_CONFIG1, 0x00000000 }, + { CS42L43_SPI_CLK_CONFIG1, 0x00000001 }, { CS42L43_SPI_CONFIG1, 0x00000000 }, { CS42L43_SPI_CONFIG2, 0x00000000 }, { CS42L43_SPI_CONFIG3, 0x00000001 }, @@ -532,10 +538,10 @@ static int cs42l43_soft_reset(struct cs42l43 *cs42l43) regcache_cache_only(cs42l43->regmap, true); regmap_multi_reg_write_bypassed(cs42l43->regmap, reset, ARRAY_SIZE(reset)); - msleep(CS42L43_RESET_DELAY); + msleep(CS42L43_RESET_DELAY_MS); if (cs42l43->sdw) { - unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_DETACH_TIMEOUT); + unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_DETACH_TIMEOUT_MS); unsigned long time; time = wait_for_completion_timeout(&cs42l43->device_detach, timeout); @@ -555,7 +561,7 @@ static int cs42l43_soft_reset(struct cs42l43 *cs42l43) static int cs42l43_wait_for_attach(struct cs42l43 *cs42l43) { if (!cs42l43->attached) { - unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_ATTACH_TIMEOUT); + unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_ATTACH_TIMEOUT_MS); unsigned long time; time = wait_for_completion_timeout(&cs42l43->device_attach, timeout); @@ -597,7 +603,7 @@ static int cs42l43_mcu_stage_2_3(struct cs42l43 *cs42l43, bool shadow) ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_BOOT_STATUS, val, (val == CS42L43_MCU_BOOT_STAGE3), - CS42L43_MCU_POLL, CS42L43_MCU_CMD_TIMEOUT); + CS42L43_MCU_POLL_US, CS42L43_MCU_CMD_TIMEOUT_US); if (ret) { dev_err(cs42l43->dev, "Failed to move to stage 3: %d, 0x%x\n", ret, val); return ret; @@ -646,7 +652,7 @@ static int cs42l43_mcu_disable(struct cs42l43 *cs42l43) ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_SOFT_INT_SHADOW, val, (val & CS42L43_CONTROL_APPLIED_INT_MASK), - CS42L43_MCU_POLL, CS42L43_MCU_CMD_TIMEOUT); + CS42L43_MCU_POLL_US, CS42L43_MCU_CMD_TIMEOUT_US); if (ret) { dev_err(cs42l43->dev, "Failed to disable firmware: %d, 0x%x\n", ret, val); return ret; @@ -690,7 +696,7 @@ static void cs42l43_mcu_load_firmware(const struct firmware *firmware, void *con ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_SOFT_INT_SHADOW, val, (val & CS42L43_PATCH_APPLIED_INT_MASK), - CS42L43_MCU_POLL, CS42L43_MCU_UPDATE_TIMEOUT); + CS42L43_MCU_POLL_US, CS42L43_MCU_UPDATE_TIMEOUT_US); if (ret) { dev_err(cs42l43->dev, "Failed to update firmware: %d, 0x%x\n", ret, val); cs42l43->firmware_error = ret; @@ -951,7 +957,7 @@ static int cs42l43_power_up(struct cs42l43 *cs42l43) } /* vdd-p must be on for 50uS before any other supply */ - usleep_range(CS42L43_VDDP_DELAY, 2 * CS42L43_VDDP_DELAY); + usleep_range(CS42L43_VDDP_DELAY_US, 2 * CS42L43_VDDP_DELAY_US); gpiod_set_value_cansleep(cs42l43->reset, 1); @@ -967,7 +973,7 @@ static int cs42l43_power_up(struct cs42l43 *cs42l43) goto err_core_supplies; } - usleep_range(CS42L43_VDDD_DELAY, 2 * CS42L43_VDDD_DELAY); + usleep_range(CS42L43_VDDD_DELAY_US, 2 * CS42L43_VDDD_DELAY_US); return 0; @@ -1051,7 +1057,7 @@ int cs42l43_dev_probe(struct cs42l43 *cs42l43) if (ret) return ret; - pm_runtime_set_autosuspend_delay(cs42l43->dev, CS42L43_AUTOSUSPEND_TIME); + pm_runtime_set_autosuspend_delay(cs42l43->dev, CS42L43_AUTOSUSPEND_TIME_MS); pm_runtime_use_autosuspend(cs42l43->dev); pm_runtime_set_active(cs42l43->dev); /* @@ -1059,7 +1065,9 @@ int cs42l43_dev_probe(struct cs42l43 *cs42l43) * the boot work runs. */ pm_runtime_get_noresume(cs42l43->dev); - devm_pm_runtime_enable(cs42l43->dev); + ret = devm_pm_runtime_enable(cs42l43->dev); + if (ret) + return ret; queue_work(system_long_wq, &cs42l43->boot_work); |