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path: root/drivers/powercap/intel_rapl_common.c
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Diffstat (limited to 'drivers/powercap/intel_rapl_common.c')
-rw-r--r--drivers/powercap/intel_rapl_common.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index 154f93b3dee5..8e77df42257a 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -574,20 +574,18 @@ static void rapl_init_domains(struct rapl_package *rp)
rapl_domain_names[i]);
rd->id = i;
+
+ /* PL1 is supported by default */
+ rp->priv->limits[i] |= BIT(POWER_LIMIT1);
rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name;
- /*
- * The PL2 power domain is applicable for limits two
- * and limits three
- */
- if (rp->priv->limits[i] >= 2) {
+ if (rp->priv->limits[i] & BIT(POWER_LIMIT2)) {
rd->rpl[1].prim_id = PL2_ENABLE;
rd->rpl[1].name = pl2_name;
}
- /* Enable PL4 domain if the total power limits are three */
- if (rp->priv->limits[i] == 3) {
+ if (rp->priv->limits[i] & BIT(POWER_LIMIT4)) {
rd->rpl[2].prim_id = PL4_ENABLE;
rd->rpl[2].name = pl4_name;
}
@@ -762,7 +760,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
cpu = rd->rp->lead_cpu;
/* domain with 2 limits has different bit */
- if (prim == FW_LOCK && rd->rp->priv->limits[rd->id] == 2) {
+ if (prim == FW_LOCK && (rd->rp->priv->limits[rd->id] & BIT(POWER_LIMIT2))) {
rpi->mask = POWER_HIGH_LOCK;
rpi->shift = 63;
}