diff options
Diffstat (limited to 'drivers/regulator/mt6358-regulator.c')
-rw-r--r-- | drivers/regulator/mt6358-regulator.c | 77 |
1 files changed, 37 insertions, 40 deletions
diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 54a4028ded8e..acb82bc85dc9 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -140,6 +140,7 @@ struct mt6358_regulator_info { [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = "vsys-" match, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_range_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -162,10 +163,11 @@ struct mt6358_regulator_info { .modeset_mask = BIT(_modeset_shift), \ } -#define MT6366_LDO(match, vreg, volt_ranges, enreg, enbit, vosel, vosel_mask) \ +#define MT6366_LDO(match, vreg, volt_ranges, supply, enreg, enbit, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_table_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -186,12 +188,12 @@ struct mt6358_regulator_info { .qi = BIT(15), \ } -#define MT6366_LDO1(match, vreg, min, max, step, \ - _da_vsel_reg, _da_vsel_mask, \ - vosel, vosel_mask) \ +#define MT6366_LDO1(match, vreg, supply, min, max, step, \ + _da_vsel_reg, _da_vsel_mask, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_range_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -211,11 +213,11 @@ struct mt6358_regulator_info { .qi = BIT(0), \ } -#define MT6366_REG_FIXED(match, vreg, \ - enreg, enbit, volt) \ +#define MT6366_REG_FIXED(match, vreg, supply, enreg, enbit, volt) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_fixed_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -578,57 +580,52 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), - MT6366_REG_FIXED("vrf12", VRF12, - MT6358_LDO_VRF12_CON0, 0, 1200000), - MT6366_REG_FIXED("vio18", VIO18, - MT6358_LDO_VIO18_CON0, 0, 1800000), - MT6366_REG_FIXED("vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), - MT6366_REG_FIXED("vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), - MT6366_REG_FIXED("vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), - MT6366_REG_FIXED("vaux18", VAUX18, - MT6358_LDO_VAUX18_CON0, 0, 1800000), - MT6366_REG_FIXED("vbif28", VBIF28, - MT6358_LDO_VBIF28_CON0, 0, 2800000), - MT6366_REG_FIXED("vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), - MT6366_REG_FIXED("va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), - MT6366_REG_FIXED("vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), - MT6366_REG_FIXED("vaud28", VAUD28, - MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6366_LDO("vdram2", VDRAM2, vdram2, + MT6366_REG_FIXED("vrf12", VRF12, "vs2-ldo2", MT6358_LDO_VRF12_CON0, 0, 1200000), + MT6366_REG_FIXED("vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000), + MT6366_REG_FIXED("vfe28", VFE28, "vsys-ldo1", MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6366_REG_FIXED("vcn28", VCN28, "vsys-ldo1", MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6366_REG_FIXED("vxo22", VXO22, "vsys-ldo1", MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6366_REG_FIXED("vaux18", VAUX18, "vsys-ldo1", MT6358_LDO_VAUX18_CON0, 0, 1800000), + MT6366_REG_FIXED("vbif28", VBIF28, "vsys-ldo1", MT6358_LDO_VBIF28_CON0, 0, 2800000), + MT6366_REG_FIXED("vio28", VIO28, "vsys-ldo2", MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6366_REG_FIXED("va12", VA12, "vs2-ldo2", MT6358_LDO_VA12_CON0, 0, 1200000), + MT6366_REG_FIXED("vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6366_REG_FIXED("vaud28", VAUD28, "vsys-ldo1", MT6358_LDO_VAUD28_CON0, 0, 2800000), + MT6366_LDO("vdram2", VDRAM2, vdram2, "vs2-ldo1", MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), - MT6366_LDO("vsim1", VSIM1, vsim, + MT6366_LDO("vsim1", VSIM1, vsim, "vsys-ldo1", MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6366_LDO("vibr", VIBR, vibr, + MT6366_LDO("vibr", VIBR, vibr, "vsys-ldo3", MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6366_LDO("vusb", VUSB, vusb, + MT6366_LDO("vusb", VUSB, vusb, "vsys-ldo1", MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6366_LDO("vefuse", VEFUSE, vefuse, + MT6366_LDO("vefuse", VEFUSE, vefuse, "vs1-ldo1", MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6366_LDO("vmch", VMCH, vmch_vemc, + MT6366_LDO("vmch", VMCH, vmch_vemc, "vsys-ldo2", MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6366_LDO("vemc", VEMC, vmch_vemc, + MT6366_LDO("vemc", VEMC, vmch_vemc, "vsys-ldo3", MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6366_LDO("vcn33", VCN33, vcn33, + MT6366_LDO("vcn33", VCN33, vcn33, "vsys-ldo3", MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6366_LDO("vmc", VMC, vmc, + MT6366_LDO("vmc", VMC, vmc, "vsys-ldo2", MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6366_LDO("vsim2", VSIM2, vsim, + MT6366_LDO("vsim2", VSIM2, vsim, "vsys-ldo2", MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), - MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, + MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, "vs1-ldo1", MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), - MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, + MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, "vs1-ldo1", MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00), - MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, + MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, "vs2-ldo1", MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00), - MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc11", VSRAM_PROC11, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), - MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, + MT6366_LDO1("vsram-others", VSRAM_OTHERS, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), - MT6366_LDO1("vsram-gpu", VSRAM_GPU, 500000, 1293750, 6250, + MT6366_LDO1("vsram-gpu", VSRAM_GPU, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), - MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc12", VSRAM_PROC12, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), - MT6366_LDO1("vsram-core", VSRAM_CORE, 500000, 1293750, 6250, + MT6366_LDO1("vsram-core", VSRAM_CORE, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f), }; |