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2020-12-04crypto: lib/blake2s - Move selftest prototype into header fileHerbert Xu3-3/+3
2020-12-04crypto: arm/aes-ce - work around Cortex-A57/A72 silion errataArd Biesheuvel1-10/+22
2020-12-04crypto: ecdh - avoid unaligned accesses in ecdh_set_secret()Ard Biesheuvel1-4/+5
2020-11-27crypto: ccree - rework cache parameters handlingGilad Ben-Yossef3-20/+63
2020-11-27crypto: cavium - Use dma_set_mask_and_coherent to simplify codeChristophe JAILLET2-16/+4
2020-11-27crypto: marvell/octeontx - Use dma_set_mask_and_coherent to simplify codeChristophe JAILLET2-16/+4
2020-11-27crypto: cavium/zip - Use dma_set_mask_and_coherent to simplify codeChristophe JAILLET1-8/+2
2020-11-27crypto: ccree - Fix fall-through warnings for ClangGustavo A. R. Silva1-0/+3
2020-11-27crypto: tcrypt - include 1420 byte blocks in aead and skcipher benchmarksArd Biesheuvel1-37/+44
2020-11-27crypto: tcrypt - permit tcrypt.ko to be builtinArd Biesheuvel1-1/+1
2020-11-27crypto: tcrypt - don't initialize at subsys_initcall timeArd Biesheuvel1-1/+1
2020-11-27MAINTAINERS: Move HiSilicon TRNG V2 driverWeili Qian1-1/+1
2020-11-27crypto: hisilicon/trng - add support for PRNGWeili Qian2-3/+239
2020-11-27crypto: hisilicon/trng - add HiSilicon TRNG driver supportWeili Qian5-0/+110
2020-11-27hwrng: hisi - remove HiSilicon TRNG driverWeili Qian3-113/+0
2020-11-27crypto: sparc - Fix sparse endianness warningsHerbert Xu2-5/+6
2020-11-27crypto: powerpc/sha256-spe - Fix sparse endianness warningHerbert Xu1-1/+1
2020-11-27crypto: mips/octeon - Fix sparse endianness warningsHerbert Xu2-7/+9
2020-11-27crypto: qat - fix excluded_middle.cocci warningskernel test robot1-3/+4
2020-11-27crypto: qce - Fix SHA result buffer corruption issuesThara Gopinath1-1/+1
2020-11-27crypto: qce - Enable support for crypto engine on sdm845Thara Gopinath1-1/+16
2020-11-27crypto: aegis128 - expose SIMD code path as separate driverArd Biesheuvel1-77/+143
2020-11-27crypto: aegis128/neon - move final tag check to SIMD domainArd Biesheuvel3-18/+57
2020-11-27crypto: aegis128/neon - optimize tail block handlingArd Biesheuvel1-14/+75
2020-11-27crypto: aegis128 - wipe plaintext and tag if decryption failsArd Biesheuvel1-6/+26
2020-11-20crypto: sun8i-ce - fix two error path's memory leakCorentin Labbe1-8/+12
2020-11-20crypto: kconfig - fix a couple of spelling mistakesColin Ian King2-2/+2
2020-11-20crypto: qat - add qat_4xxx driverGiovanni Cabiddu11-1/+833
2020-11-20crypto: qat - add hook to initialize vector routing tableGiovanni Cabiddu2-0/+4
2020-11-20crypto: qat - target fw images to specific AEsGiovanni Cabiddu2-5/+56
2020-11-20crypto: omap-aes - Fix PM disable depth imbalance in omap_aes_probeZhang Qilong1-1/+2
2020-11-20crypto: hisilicon/zip - add a work_queue for zip irqYang Shen1-3/+23
2020-11-20crypto: lib/curve25519 - Move selftest prototype into header fileHerbert Xu2-2/+2
2020-11-20crypto: sha - split sha.h into sha1.h and sha2.hEric Biggers120-155/+205
2020-11-20crypto: crypto4xx - Replace bitwise OR with logical OR in crypto4xx_build_pdNathan Chancellor1-1/+1
2020-11-20crypto: caam/qi - simplify error path for context allocationHoria Geantă1-4/+4
2020-11-20crypto: arm64/gcm - move authentication tag check to SIMD domainArd Biesheuvel2-18/+43
2020-11-20crypto: hisilicon/sec2 - Fix aead authentication setting key errorKai Ye1-2/+3
2020-11-13crypto: arm64/chacha - simplify tail block handlingArd Biesheuvel1-124/+69
2020-11-13crypto: qat - add gen4 firmware loaderJack Xu5-17/+78
2020-11-13crypto: qat - add support for broadcasting modeJack Xu4-3/+99
2020-11-13crypto: qat - add support for shared ustoreJack Xu3-13/+19
2020-11-13crypto: qat - allow to target specific AEsJack Xu6-8/+42
2020-11-13crypto: qat - add FCU CSRs to chip infoJack Xu3-16/+53
2020-11-13crypto: qat - add CSS3K supportJack Xu4-40/+68
2020-11-13crypto: qat - use ae_maskJack Xu1-12/+14
2020-11-13crypto: qat - add check for null pointerJack Xu1-11/+17
2020-11-13crypto: qat - add misc control CSR to chip infoJack Xu2-4/+8
2020-11-13crypto: qat - add wake up event to chip infoJack Xu3-1/+6
2020-11-13crypto: qat - add clock enable CSR to chip infoJack Xu2-4/+7